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SHF: Small: Energy and Computational Efficient Deep Generative AI Models via Emerging Devices, Circuits, and Architectures

SHF：小型：通过新兴设备、电路和架构实现能源和计算高效的深度生成人工智能模型

基本信息

批准号：
2219753
负责人：
Qilian Liang
金额：
$ 59.92万
依托单位：
University of Texas at Arlington
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2022
资助国家：
美国
起止时间：
2022-07-15 至 2025-06-30
项目状态：
未结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=2219753&HistoricalAwards=false
关键词：
SHF Small Energy Computational Efficient

项目摘要

Deep generative artificial intelligence (AI) models can learn to reproduce their inputs or the variational versions of their inputs. However, a critical challenge that needs to be addressed is their energy and computational cost. Foundational research in the design, verification, operation, and evaluation of deep generative AI hardware and software through novel approaches in emerging devices, circuits, and architectures is desirable. The energy and computational cost of AI has become a bottleneck for its applications in the real world. Research and education will be integrated through course and lab development. Under-represented and women students will be recruited for this project through the Society of Hispanic Professional Engineers, National Society of Black Engineers, and Society of Woman Engineers.This project targets the development of new generative AI models with simpler designs and architecture than are currently available. A novel path is explored for designing deep-learning hardware accelerators via efforts that span from devices and circuits to architectures and algorithms. The Cellular Neural Network-based realizations for key operations in convolution-based networks is studied, because it allows the bulk of the computation associated with a deep generative AI model to be performed in the analog domain. The development of mixed-signal circuits and architectures that lead to the best deep generative network designs by exploiting unique physics of emerging device technologies is investigated. The project is expected to generate orders of magnitude improvements in energy and delay for deep generative AI models, which will promote their applications and benefit the AI industry.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

深度生成人工智能（AI）模型可以学习复制其输入或其输入的变分版本。然而，需要解决的一个关键挑战是它们的能量和计算成本。通过新兴设备、电路和架构的新方法，对深度生成人工智能硬件和软件进行设计、验证、操作和评估的基础研究是可取的。人工智能的能量和计算成本已经成为其在现实世界中应用的瓶颈。研究和教育将通过课程和实验室开发相结合。该项目将通过西班牙裔专业工程师协会、全国黑人工程师协会和女性工程师协会招募代表性不足的女性学生。这个项目的目标是开发新的生成式人工智能模型，其设计和架构比目前可用的更简单。通过从器件和电路到架构和算法的努力，探索了设计深度学习硬件加速器的新途径。研究了基于细胞神经网络的卷积网络关键操作的实现，因为它允许在模拟域中执行与深度生成人工智能模型相关的大量计算。研究了混合信号电路和架构的发展，这些电路和架构通过利用新兴设备技术的独特物理特性来实现最佳的深度生成网络设计。该项目预计将为深度生成人工智能模型带来能量和延迟的数量级改进，这将促进其应用并使人工智能行业受益。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

期刊论文数量（7）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

5G Channel Forecasting and Power Allocation Based on LSTM Network and Cooperative Communication

基于LSTM网络和协作通信的5G信道预测和功率分配

DOI：
发表时间：
2022
期刊：
Lecture notes of the Institute for Computer Sciences Social Informatics and Telecommunications Engineering
影响因子：
0
作者：
Zhangliang Chen, Qilian Liang
通讯作者：
Zhangliang Chen, Qilian Liang

Neural Network for UWB Radar Sensor Network-Based Sense-Through-Wall Human Detection

用于基于 UWB 雷达传感器网络的穿墙人体检测的神经网络

DOI：
发表时间：
2023
期刊：
Lecture notes in electrical engineering
影响因子：
0
作者：
Dheeral Bhole, Qilian Liang
通讯作者：
Dheeral Bhole, Qilian Liang

A statistical approach for neural network pruning with application to internet of things

DOI：
10.1186/s13638-023-02254-3
发表时间：
2023-05
期刊：
EURASIP Journal on Wireless Communications and Networking
影响因子：
2.6
作者：
Chengchen Mao;Q. Liang;C. Pan;Ioannis Schizas
通讯作者：
Chengchen Mao;Q. Liang;C. Pan;Ioannis Schizas

Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes

DOI：
10.1109/ted.2022.3225512
发表时间：
2023-01
期刊：
IEEE Transactions on Electron Devices
影响因子：
3.1
作者：
Zhenlin Pei;M. Mayahinia;Hsiao-Hsuan Liu;M. Tahoori;F. Catthoor;Z. Tokei;C. Pan
通讯作者：
Zhenlin Pei;M. Mayahinia;Hsiao-Hsuan Liu;M. Tahoori;F. Catthoor;Z. Tokei;C. Pan

Towards Area Efficient Logic Circuit: Exploring Potential of Reconfigurable Gate by Generic Exact Synthesis

迈向面积高效的逻辑电路：通过通用精确综合探索可重构门的潜力