EAGER: A novel route for high activation of implanted p-type regions in vertical Gallium Nitride devices.
EAGER:一种在垂直氮化镓器件中高度激活注入 p 型区域的新途径。
基本信息
- 批准号:2230090
- 负责人:
- 金额:$ 13.74万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2022
- 资助国家:美国
- 起止时间:2022-10-01 至 2025-03-31
- 项目状态:未结题
- 来源:
- 关键词:
项目摘要
Semiconductor based power electronics enabled efficiency improvements could save 1.2 trillion kilowatt-hour by 2030, avoiding approximately 733 million metric tons of CO2. Implementation of wide bandgap materials in power electronic devices is the single most important revolution to further increase system efficiency, reduce the size and weight of devices, improve reliability, and reduce life cycle cost. Among various wide bandgap materials, gallium nitride (GaN) vertical power devices are conceived as a next generation technology. Despite the success of gallium nitride lateral power devices, the implantation of vertical gallium nitride power devices is delayed by limitation of p-n junction and highly doped p layer formation. While n-type junctions via implantation have gained success, p-type junctions formed via implantation are still facing key challenges. Hence, developing an effective highly doped p-type process is a critical need to enable high performance gallium nitride devices. This project aims to address the current challenges of p-type doping on gallium nitride by a novel route for highly doped p-type junctions using the process of solid phase epitaxy. This presents a unique opportunity for achieving high current and high voltage power devices to significantly benefit power electronic systems. The impact of these advances could also drive enhancements in ultra-wide bandgap devices. The proposed novel p-doping can enable wide adoption of vertical gallium nitride power devices and help maintain leadership in wide bandgap semiconductor technology and economic competitiveness. This project provides a hand-on research experience for undergraduate students on device physics, processing, and characterization. The experimental results will be incorporated into undergraduate and graduate courses. This project proposes a novel route for highly doped p-type in gallium nitride using the process of solid phase epitaxy after implantation. This solid phase epitaxy process involves the conversion of a metastable amorphous region containing the targeted p-type dopant into a crystalline region through modest temperature anneals. In prior work on other semiconductors, solid phase epitaxy has shown to result in increased active dopant concentration that is in great excess of the solid solubility limit, decreased damage, reduced channeling, and lower temperature operation. All these characteristics are highly desirable for vertical devices and warrant investigation of solid phase epitaxy in gallium nitride. The proposed process will involve three key steps: a pre-amorphization implantation, a p-type dopant implantation and a moderate temperature anneal to achieve high active concentration. This process is expected to convert the amorphous region containing the targeted p-type dopant into a crystalline region through modest temperature anneals. The recrystallization temperature and time depend on the orientation of the crystalline substrate and the type and concentration of implanted species. The proposed research aims to solve the fundamental problem in III-nitride devices towards high current and high voltage power devices and may also be applied towards emerging ultra-wideband gap materials. The research will be carried out in multiple tasks including molecular dynamic and process simulation, ion implantation, solid phase epitaxy anneal optimization, device fabrication and characterization of structures including transfer line method structures as well as diode structures to assess impact of solid phase epitaxy process on gallium nitride p-junction performance.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
到2030年,基于半导体的电力电子实现的能效改进可以节省1.2万亿千瓦时,减少约7.33亿吨二氧化碳。宽禁带材料在电力电子器件中的应用是进一步提高系统效率、减小器件尺寸和重量、提高可靠性、降低寿命周期成本的一场最重要的革命。在各种宽带隙材料中,氮化镓(GaN)垂直功率器件被认为是下一代技术。尽管氮化镓横向功率器件取得了成功,但由于p-n结的限制和高掺杂p层的形成,垂直氮化镓功率器件的注入被推迟了。虽然通过注入形成的n型结已经取得了成功,但通过注入形成的p型结仍然面临着关键的挑战。因此,开发有效的高掺杂p型工艺是实现高性能氮化镓器件的迫切需要。该项目旨在通过采用固相外延工艺实现高掺杂p型结的新途径来解决目前在氮化镓上p型掺杂的挑战。这为实现大电流和高压功率器件提供了一个独特的机会,使电力电子系统显著受益。这些进展的影响也可能推动超宽带隙器件的增强。建议的新型p掺杂可以使垂直氮化镓功率器件得到广泛采用,并有助于保持在宽禁带半导体技术和经济竞争力方面的领先地位。该项目为本科生提供了设备物理、工艺和表征方面的实践研究体验。实验结果将纳入本科生和研究生课程。本项目提出了一种采用注入后固相外延工艺制备高掺杂p型氮化镓的新方法。这一固相外延过程包括通过适度的温度退火将含有目标p型掺杂的亚稳态非晶区转变为晶区。在以前对其他半导体的研究中,固相外延已经表明,固相外延可以增加活性杂质浓度,大大超过固溶度极限,减少损伤,减少沟道,并降低操作温度。所有这些特性对于垂直器件来说都是非常理想的,也是氮化镓固相外延研究的基础。所提出的工艺将包括三个关键步骤:预非晶化注入、p型掺杂注入和中温退火以获得高活性浓度。这一过程有望通过适度的温度退火,将含有目标p型掺杂剂的非晶区转变为晶区。再结晶温度和时间取决于晶体衬底的取向和注入物种的类型和浓度。这项研究旨在解决III-氮化物器件向大电流、高压功率器件发展的根本问题,也可能适用于新兴的超宽带GaP材料。这项研究将在多项任务中进行,包括分子动力学和工艺模拟、离子注入、固相外延退火优化、器件制造和结构表征,包括传输线方法结构和二极管结构,以评估固相外延工艺对氮化镓p结性能的影响。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Veena Misra其他文献
N and P metal oxide semiconductor field effect transistor characteristics of hafnium-doped SiO2 gate dielectrics
- DOI:
10.1007/s11664-001-0165-1 - 发表时间:
2001-12-01 - 期刊:
- 影响因子:2.500
- 作者:
Veena Misra;Manoj Kulkarni;Huicai Zhong - 通讯作者:
Huicai Zhong
Hybrid silicon/molecular FETs: a study of the interaction of redox-active molecules with silicon MOSFETs
混合硅/分子 FET:氧化还原活性分子与硅 MOSFET 相互作用的研究
- DOI:
- 发表时间:
2006 - 期刊:
- 影响因子:2.4
- 作者:
S. Gowda;G. Mathur;Qiliang Li;S. Surthi;Veena Misra - 通讯作者:
Veena Misra
High quality gate dielectrics formed by rapid thermal chemical vapor deposition of silane and nitrous oxide
- DOI:
10.1007/bf02666631 - 发表时间:
1996-03-01 - 期刊:
- 影响因子:2.500
- 作者:
Veena Misra;Xiaoli Xu;Brian E. Hornung;Richard T. Kuehn;Donald S. Miles;John R. Hauser;Jimmie J. Wortman - 通讯作者:
Jimmie J. Wortman
Development of plasmonics-active SERS substrates on a wafer scale for chemical and biological sensing applications
开发用于化学和生物传感应用的晶圆级等离子体活性 SERS 基底
- DOI:
10.1109/iedm.2008.4796732 - 发表时间:
2008 - 期刊:
- 影响因子:0
- 作者:
A. Dhawan;Yan Du;Hsin;Donovan N. Leonard;Veena Misra;Mehmet C. Öztürk;M. Gerhold;Tuan Vo - 通讯作者:
Tuan Vo
Properties of Ta–Mo alloy gate electrode for n-MOSFET
- DOI:
10.1007/s10853-005-2108-3 - 发表时间:
2005-05-01 - 期刊:
- 影响因子:3.900
- 作者:
Chung Keun Lee;Jae Young Kim;Shin Nam Hong;Huicai Zhong;Bei Chen;Veena Misra - 通讯作者:
Veena Misra
Veena Misra的其他文献
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{{ truncateString('Veena Misra', 18)}}的其他基金
Wearable Nanodevices, Linking Health and Environment: RET in Engineering and Computer Science Site
可穿戴纳米设备,连接健康与环境:工程和计算机科学网站中的 RET
- 批准号:
1407202 - 财政年份:2014
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
NSF Nanosystems Engineering Research Center for Advanced Self-Powered Systems of Integrated Sensors and Technologies (ASSIST)
NSF 纳米系统先进自供电集成传感器和技术系统工程研究中心 (ASSIST)
- 批准号:
1160483 - 财政年份:2012
- 资助金额:
$ 13.74万 - 项目类别:
Cooperative Agreement
SGER: Novel Ultra Fast Heating Platform for In-Situ Study of Nanoparticle Based Devices
SGER:用于纳米颗粒器件原位研究的新型超快速加热平台
- 批准号:
0811137 - 财政年份:2008
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
Collaborative Research: High Density Metal and Semiconductor Nanoparticles for Memory and Photonic Applications
合作研究:用于存储器和光子应用的高密度金属和半导体纳米颗粒
- 批准号:
0802157 - 财政年份:2008
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
Scalable Strained Silicon MOSFET Technology with Advanced Gatestack Materials
采用先进栅极堆叠材料的可扩展应变硅 MOSFET 技术
- 批准号:
0301238 - 财政年份:2003
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
PECASE: Novel Approaches for Integration of Vertical Si Nanoelectronics
PECASE:垂直硅纳米电子集成的新方法
- 批准号:
0093815 - 财政年份:2001
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
POWRE: Nano-gate Engineering for Ultra-fast CMOS devices
POWRE:超快 CMOS 器件的纳米门工程
- 批准号:
0074800 - 财政年份:2000
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
Advanced Gate Dielectrics for Silicon Carbide Metal Oxide Semiconductor Application
用于碳化硅金属氧化物半导体应用的先进栅极电介质
- 批准号:
9906255 - 财政年份:1999
- 资助金额:
$ 13.74万 - 项目类别:
Standard Grant
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