EAGER: A novel route for high activation of implanted p-type regions in vertical Gallium Nitride devices.

EAGER：一种在垂直氮化镓器件中高度激活注入 p 型区域的新途径。

• 批准号: 2230090
• 负责人: Veena Misra
• 金额: $ 13.74万
• 依托单位: North Carolina State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2022
• 资助国家: 美国
• 起止时间: 2022-10-01 至 2025-03-31
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2230090&HistoricalAwards=false
• 关键词: EAGER; novel; route; activation; implanted

Semiconductor based power electronics enabled efficiency improvements could save 1.2 trillion kilowatt-hour by 2030, avoiding approximately 733 million metric tons of CO2. Implementation of wide bandgap materials in power electronic devices is the single most important revolution to further increase system efficiency, reduce the size and weight of devices, improve reliability, and reduce life cycle cost. Among various wide bandgap materials, gallium nitride (GaN) vertical power devices are conceived as a next generation technology. Despite the success of gallium nitride lateral power devices, the implantation of vertical gallium nitride power devices is delayed by limitation of p-n junction and highly doped p layer formation. While n-type junctions via implantation have gained success, p-type junctions formed via implantation are still facing key challenges. Hence, developing an effective highly doped p-type process is a critical need to enable high performance gallium nitride devices. This project aims to address the current challenges of p-type doping on gallium nitride by a novel route for highly doped p-type junctions using the process of solid phase epitaxy. This presents a unique opportunity for achieving high current and high voltage power devices to significantly benefit power electronic systems. The impact of these advances could also drive enhancements in ultra-wide bandgap devices. The proposed novel p-doping can enable wide adoption of vertical gallium nitride power devices and help maintain leadership in wide bandgap semiconductor technology and economic competitiveness. This project provides a hand-on research experience for undergraduate students on device physics, processing, and characterization. The experimental results will be incorporated into undergraduate and graduate courses. This project proposes a novel route for highly doped p-type in gallium nitride using the process of solid phase epitaxy after implantation. This solid phase epitaxy process involves the conversion of a metastable amorphous region containing the targeted p-type dopant into a crystalline region through modest temperature anneals. In prior work on other semiconductors, solid phase epitaxy has shown to result in increased active dopant concentration that is in great excess of the solid solubility limit, decreased damage, reduced channeling, and lower temperature operation. All these characteristics are highly desirable for vertical devices and warrant investigation of solid phase epitaxy in gallium nitride. The proposed process will involve three key steps: a pre-amorphization implantation, a p-type dopant implantation and a moderate temperature anneal to achieve high active concentration. This process is expected to convert the amorphous region containing the targeted p-type dopant into a crystalline region through modest temperature anneals. The recrystallization temperature and time depend on the orientation of the crystalline substrate and the type and concentration of implanted species. The proposed research aims to solve the fundamental problem in III-nitride devices towards high current and high voltage power devices and may also be applied towards emerging ultra-wideband gap materials. The research will be carried out in multiple tasks including molecular dynamic and process simulation, ion implantation, solid phase epitaxy anneal optimization, device fabrication and characterization of structures including transfer line method structures as well as diode structures to assess impact of solid phase epitaxy process on gallium nitride p-junction performance.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

到2030年，基于半导体的电力电子技术实现的效率改进可以节省1.2万亿千瓦时，避免约7.33亿公吨的二氧化碳。在电力电子器件中实现宽带隙材料是进一步提高系统效率、减小器件尺寸和重量、提高可靠性和降低寿命周期成本的最重要的革命。在各种宽带隙材料中，氮化镓（GaN）垂直功率器件被认为是下一代技术。尽管氮化镓横向功率器件获得了成功，但垂直氮化镓功率器件的注入受到p-n结和高掺杂p层形成的限制而延迟。 虽然通过注入形成的n型结已经取得了成功，但是通过注入形成的p型结仍然面临着关键挑战。因此，开发有效的高掺杂p型工艺是实现高性能氮化镓器件的关键需求。该项目旨在通过使用固相外延工艺的高掺杂p型结的新路线来解决氮化镓上p型掺杂的当前挑战。这为实现大电流和高电压功率器件提供了独特的机会，以显著地有益于电力电子系统。这些进步的影响也可能推动超宽带隙器件的增强。所提出的新型p掺杂可以使垂直氮化镓功率器件得到广泛采用，并有助于保持宽带隙半导体技术和经济竞争力的领先地位。该项目为本科生提供了关于器件物理，处理和表征的实践研究经验。实验结果将纳入本科和研究生课程。 本计画提出一种新颖的方法，利用植入后固相磊晶的制程，在氮化镓中进行高浓度的p型掺杂。该固相外延工艺涉及通过适度的温度退火将含有目标p型掺杂剂的亚稳非晶区转化为结晶区。在对其它半导体的先前工作中，固相外延已经显示出导致大大超过固溶度极限的活性掺杂剂浓度增加、损伤减少、沟道减少和较低温度操作。所有这些特性都是垂直器件非常需要的，并保证氮化镓固相外延的研究。提出的工艺将涉及三个关键步骤：预非晶化注入，p型掺杂剂注入和中温退火，以实现高活性浓度。预期该工艺通过适度的温度退火将含有目标p型掺杂剂的非晶区转化为结晶区。再结晶温度和时间取决于晶体衬底的取向和注入物质的类型和浓度。拟议的研究旨在解决III族氮化物器件对大电流和高电压功率器件的根本问题，也可能适用于新兴的超宽带间隙材料。该研究将在多个任务中进行，包括分子动力学和工艺模拟，离子注入，固相外延退火优化，器件制造和包括传输线方法结构以及二极管结构的结构的表征，以评估固相外延工艺对氮化镓p-该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。