Reconfigurable Field-Effect-Transistors

在过去的几十年里，通过在相同的芯片面积上增加越来越小的晶体管数量，实现了性能的提高，从而增加了高度集成电路（ic）的功能。然而，晶体管的可扩展性很快就会走到尽头。因此，进一步增加ic功能的一种有吸引力的替代方法是向器件本身添加功能。这主要可以通过所谓的可重构触点来实现，这种触点允许动态地改变器件的a型、p型以及带对带隧道场效应晶体管（ttfet）。具有可重构触点的场效应晶体管（fet）由至少两个栅极组成，即一个是实际栅极，另一个栅极（极性栅极）允许重新配置晶体管。基于这种多栅极器件架构，许多基于纳米管、纳米线和二维材料的可重构器件已经被证明。特别是，在传统晶体管和TFET操作之间切换是非常有吸引力的，因为这将使电路既可以优化到最高性能（传统FET操作），也可以优化到最低功耗（TFET操作）。所有当前可重构场效应管的主要缺点是极性栅极不会改变接触金属的功函数，因此，为了获得类似的电子和空穴注入，在中间间隙处需要费米能级排列。因此，载流子总是通过大量的肖特基势垒注入，这将产生严重恶化的器件特性。在本项目中，实现了电子和空穴具有类似欧姆接触的注入概率的可重构触点。此外，触点的制作方式使单极器件操作成为可能，这对于适当的TFET功能非常重要。为此，将采用由硅通道层、超薄SiNx和石墨烯组成的门控夹层。石墨烯将被用作金属源电极。虽然文献中已经研究了石墨烯-硅二极管/触点结构，但这里重要的补充是石墨烯和硅之间的超薄SiNx层。为了获得极低密度的硅隙态，这一层是决定性的，这是单极器件工作所必需的，更重要的是，对于具有低断开状态泄漏的TFET工作。石墨烯中Dirac点附近的低密度态进一步降低了硅隙态的密度，此外，通过石墨烯/超薄SiNx堆叠实现硅的充分门控，从而可以在适当的栅极电压下移动导价带。因此，目前的方法提供了真正可重构的场效应管，可以作为n型，p型和隧道场效应晶体管工作。

During the last decades, a performance increase and thus increased functionality of highly integrated circuits (ICs) has been achieved by increasing the number of transistors of decreasing size onto the same chip area. The scalability of transistors, however, will soon come to an end. Therefore, an attractive alternative approach to further increase the functionality of ICs is to add functionality to the devices themselves. This can primarily be achieved with so-called reconfigurable contacts that allow changing the devices to work as a-type, p-type as well as band-to-band tunnel field-effect transistor (TFET) dynamically.Field effect transistors (FETs) with reconfigurable contacts consist of at least two gate electrodes, namely one that is the actual gate and the other gate electrode (the polarity gate) that allows to reconfigure the transistor. Based on such multiple-gate device architectures, a number of reconfigurable devices based on nanotubes, nanowires and two-dimensional materials have been demonstrated. In particular, switching between the operation as a conventional transistor and a TFET is very attractive since this would enable circuits that can operate either optimized to highest performance (conventional FET operation) or to lowest power consumption (TFET operation). The major drawback of all current reconfigurable FETs is the fact that the polarity gate does not change the work function of the contact metal and as a result, a Fermi level line-up at mid-gap is necessary in order to obtain similar injection of electrons and holes. Hence, carriers are always injected through a substantial Schottky-barrier which yields strongly deteriorated device characteristics. Within the present project, reconfigurable contacts with an injection probability similar to ohmic contacts for electrons and holes are realized. Furthermore, the contacts are made in a way that enables unipolar device operation which is important for proper TFET functionality. To this end, a gated sandwich consisting of a silicon channel layer, ultrathin SiNx and graphene will be employed. The graphene will be used as a metallic source electrode. While graphene-silicon diode/contact structures have been studied in literature the important addition here is the ultrathin SiNx layer in-between the graphene and the silicon. This layer is decisive in order to obtain a very low density of gap-states in the silicon which is necessary for unipolar device operation and, more importantly, for TFET operation with low off-state leakage. The low density of states in graphene around the Dirac point further decreases the density of silicon gap-states and, in addition, enables sufficient gating of the silicon through the graphene/ultrathin SiNx stack so that the conduction/valence bands can be shifted with an appropriate gate voltage. As a result, the current approach provides truly reconfigurable FETs that can operate as n-type, p-type and tunnel field-effect transistors.