Unlocking Analog Features and Full Parallelism for HDL-based Synthesis of PLiM

解锁基于 HDL 的 PLiM 合成的模拟功能和完全并行性

• 批准号: 406079023
• 负责人: Professor Dr. Rolf Drechsler
• 金额: --
• 依托单位: Cyber-Physical Systems Group (CPS)
• 依托单位国家: 德国
• 项目类别: Research Grants
• 资助国家: 德国
• 项目状态: 未结题
• 来源: https://gepris.dfg.de/gepris/projekt/406079023?language=en
• 关键词: Unlocking; Analog; Features; Full; Parallelism

In-memory computing enabled by advanced non-volatile memory technologies is a promising paradigm for the known issue of von Neumann bottleneck in current computing systems. However, the capacity of in-memory computing for logic design has not been fully explored. This proposal includes six work packages that contribute to the advancement and comprehensiveness of design automation for logic-in-memory computer architectures based on standard crossbars of Resistive RAM (RRAM). This research plan aims at enhancing the performance of resistive logic-in-memory computer architectures by creating new capacity for parallelism, developing new features based on the inherent analog computation capability of RRAM and approximate computing. Furthermore, we aim at adding these new elements to the Logic-in-Memory Hardware Description Language (LiM-HDL), which has been developed in the initial phase of the project.

先进的非易失性存储器技术支持的内存计算是解决当前计算系统中已知的冯·诺伊曼瓶颈问题的一个很有前途的范例。然而，内存计算在逻辑设计中的应用还没有得到充分的开发。该提案包括六个工作包，这些工作包有助于基于电阻性RAM （RRAM）标准交叉条的逻辑内存计算机体系结构设计自动化的进步和全面。该研究计划旨在通过创建新的并行能力，开发基于RRAM固有模拟计算能力和近似计算的新特性来提高电阻式内存逻辑计算机体系结构的性能。此外，我们的目标是将这些新元素添加到在项目初始阶段开发的逻辑内存硬件描述语言（LiM-HDL）中。