BASIC STUDY ON HIGH-PERFORMANCE MULTIPLE-VALUED SUPER CHIP FOR INTELLIGENT ROBOTS

在基于阵列结构的传统二进制算术电路中，进位传播限制了运算速度。符号数字（SD）系统中的进位传播总是限制在左边的一个位置。然而，SD数系统还没有从集成电路实现的角度进行研究，本项目从实现由电流源、电流镜、阈值检测器和双向电流输入组成的多值双向电流模式电路开始。利用双向电流模电路实现了SD全加器。给出了采用2 μ m CMOS工艺的SD全加器版图。该模块由一个加法器、一个部分积发生器、一个商数发生器、一个符号反转器、两个编码器和四个接线块构成，通过适当地规定模块之间的互连，可以使用这样得到的模块实现基于加、减、乘和除的任何算术运算。这种模块化实现对于半定制的超大规模集成电路（如门阵列）非常有用。与最快的二进制乘法器进行了比较，其乘法时间与最快的二进制乘法器相当。然而，从降低设计复杂度的角度来看，SD乘法器比二进制乘法器有着更上级的优势。最后，论证了多值技术的这些优点对于智能机器人多值超级芯片的实现是有用的。对芯片的高性能也进行了详细的评估。

In the conventional binary arithmetic circuits based on array structures, the operating speed is restricted by carry propagation. The carry propagation in the signed-digit (SD) number systems is always limited to one position to the left. However, the SD number systems have not been studied from the point of view of integrated circuit implementation.This project begins with implementation of the multiple-valued bidirectional current-mode circuits composed of current source, current mirrors, threshold detector, and bidirectional current input. Using the bidirectional currentmode circuits, the SD full adder is realized. The layout of the SD full adder is given with 2-mum CMOS technology. The module is constructed by an adder, a partial-product generator, a quotient digit generator, a sign invertor, two encoders and four wiring blocks.Using the modules thus obtained, any arithmetic operations based on addition, subtraction, multiplication and division can be realized by appropriately specifying the interconnection among the modules. This modular realization is very useful for semicustom VLSI as gate array. The comparison between the proposed SD multiplier and the fastest binary multiplier is carried out.The SD multiply time is comparable to that of the fastest binary multiplier. From the point of view of reduction in design complexity, however, the SD multiplier is much more superior to the binary multiplier.Lastly, it is demonstrated that these advantages of the multiple-valued technology are useful for implementation of the multiple-valued super chip for intelligent robots. The high-performance of the chip is also evaluated in detail.