Integrated duobinary VCSEL driver for ultra-fast short-range electro-optical transmitters (DUET)

在DUET项目中，我们希望开发用于双二进制信号直接调制垂直腔面发射激光器(VCSELs)的新概念和集成驱动器，从而大幅提高光发射机的性能，为下一代光短距离数据通信系统铺平道路。为了适应互联网服务的进步以及5G、6G和物联网的发展带来的日益增长的互联网数据流量，基于垂直腔面发射激光器(VCSELs)的短程光互连在过去十年得到了极大的关注。虽然VCSEL能够实现低成本和高功率效率的数据传输，带宽低于30 GHz，但它们将传输的非归零(NRZ)数据速率限制在大约40 Gb/S。因此，人们提出了克服这一限制的技术。四级脉冲幅度调制(PAM-4)可以将NRZ数据速率提高一倍，但随之而来的是系统复杂性增加、功率损失以及对噪声和非线性的容忍度降低。采用信号均衡技术，实现了基于垂直腔面发射激光器的最快数据传输速率71 Gb/S。然而，这是以13.4pJ/比特的高能耗为代价的。对于71 Gb/S以上的光数据速率，目前还没有集成的垂直腔面发射激光器驱动器。双二进制是一种三级调制，其频谱效率是非归零码的两倍。与PAM-4相比，它提供了一种更简单、更节能的实施方案，并且对噪声和非线性的容忍度更高。它主要应用于铜基链路，也可应用于100 Gb/S的远距离光链路。然而，通常使用实验室仪器或离线数字信号处理来产生双二进制信号，这不适合低功耗的系统实现。对于基于VCSEL的链路，几乎没有关于双二进制调制的工作可用，并且只报道了一个5 Gb/S的集成VCSEL驱动器。在DUET中，我们将设计基于VCSEL的新型发射器，采用现有最快的SiGe BiCMOS技术，集成双二进制驱动器，提供最高振荡频率为500 GHz的晶体管。将设计三个VCSEL驱动器，其中包括一个双二进制预编码器、一个均衡的双二进制驱动器和一个无编码器的双二进制驱动器。此外，还将通过使用我们的同时调整偏置电流和负载电阻的创新方法来研究性能和功率自适应。从密集的系统仿真开始，包括当前高速VCSEL的行为模型，并最终验证所设计的硬件驱动程序，我们打算找到最佳折衷方案，以实现高达116 Gb/S的高数据速率和低于7pJ/bit的低能耗。与基于VCSEL的最快数据传输(71 Gb/S)相比，这在速度上提高了1.6倍，在能源效率上提高了1.9倍。

In the DUET project, we want to develop novel concepts and integrated drivers for the direct modulation of vertical-cavity surface-emitting lasers (VCSELs) with a duobinary signal, which massively improves the performance of optical transmitters and paves the way for next generation optical short-range data communication systems.To accommodate the increasing Internet data traffic, induced by the progress of Internet services and the development of 5G, 6G and the Internet of Things, short-range optical interconnects based on VCSELs have gained huge attention in the last decade. While VCSELs enable low-cost and power-efficient data transmission, with bandwidths of below 30 GHz, they limit the transmitted non-return-to-zero (NRZ) data rate to approximately 40 Gb/s. Therefore, techniques to overcome this limitation have been proposed. Pulse amplitude modulation with four levels (PAM-4) can double the NRZ data rate, but comes along with increased system complexity, power penalty and reduced tolerance to noise and nonlinearity. The fastest VCSEL-based data transmission of 71 Gb/s was achieved by using signal equalization. However, this comes at the cost of high energy consumption of 13.4 pJ/bit. For optical data rates above 71 Gb/s, no integrated VCSEL-drivers exist today.Duobinary is a 3-level modulation, which is twice as spectrally efficient as NRZ. Compared to PAM-4, it offers a simpler as well as a more energy-efficient implementation and is more tolerant to noise and nonlinearities. It has been mainly applied in copper-based links and also in long-range optical links with 100 Gb/s. However, very often laboratory instruments or offline digital signal processing is used to generate the duobinary signal, which is not suitable for a system implementation with low power consumption. For VCSEL-based links almost no works on duobinary modulation are available and only one integrated VCSEL driver at 5 Gb/s was reported. In DUET, we will design novel VCSEL-based transmitters with integrated duobinary drivers in the fastest available SiGe BiCMOS technology, which offers transistors with 500 GHz maximum oscillation frequency. Three VCSEL drivers will be designed incorporating a duobinary pre-/encoder, an equalized duobinary driver and an encoder-less duobinary driver. Furthermore, performance and power adaptivity will be investigated, by using our innovative method of simultaneous tuning of bias currents and load resistances. Starting with intensive system simulations, including behavioral models of current high-speed VCSELs, and finalizing with the verification of designed hardware drivers, we intend to find the best trade-offs for high data rates of up to 116 Gb/s at low energy consumption of below 7 pJ/bit. This is a >1.6X improvement in speed and a >1.9X improvement in energy efficiency compared to the fastest state-of-the-art VCSEL-based data transmission of 71 Gb/s.