Integrated duobinary VCSEL driver for ultra-fast short-range electro-optical transmitters (DUET)

在DUET项目中，我们希望开发新的概念和集成驱动器，用于使用双二进制信号直接调制垂直腔面发射激光器（VCSEL），这将大大提高光发射机的性能，并为下一代光短距离数据通信系统铺平道路。为了适应互联网服务的进步和5G的发展带来的互联网数据流量的增加，随着6 G和物联网的发展，基于VCSEL的短程光互连在过去十年中受到了极大的关注。虽然VCSEL能够实现低成本和高能效的数据传输，带宽低于30 GHz，但它们将传输的非归零（NRZ）数据速率限制为约40 Gb/s。因此，已经提出了克服这种限制的技术。四电平脉冲幅度调制（PAM-4）可以使NRZ数据速率加倍，但沿着增加了系统复杂性、功率损失以及对噪声和非线性的容限降低。通过使用信号均衡，实现了最快的基于VCSEL的71 Gb/s的数据传输。然而，这是以13.4 pJ/bit的高能耗为代价的。对于71 Gb/s以上的光数据速率，目前还没有集成VCSEL驱动器。双二进制是一种3级调制，其频谱效率是NRZ的两倍。与PAM-4相比，它提供了一个更简单、更节能的实现方式，并且对噪声和非线性的容忍度更高。它主要应用于铜基链路，也应用于100 Gb/s的远程光链路。然而，通常使用实验室仪器或离线数字信号处理来产生双二进制信号，这不适合于具有低功耗的系统实现。对于基于VCSEL的链路，几乎没有关于双二进制调制的工作，并且仅报道了一个5Gb/s的集成VCSEL驱动器。在DUET中，我们将设计新型VCSEL发射器，该发射器采用最快的SiGe BiCMOS技术集成双二进制驱动器，该技术提供最大振荡频率为500 GHz的晶体管。三个VCSEL驱动器将被设计为包含双二进制预/编码器、均衡双二进制驱动器和无编码器双二进制驱动器。此外，性能和功率自适应性将进行调查，通过使用我们的创新方法，同时调整偏置电流和负载电阻。从密集的系统模拟开始，包括当前高速VCSEL的行为模型，并最终验证设计的硬件驱动程序，我们打算找到最佳的权衡，以达到高达116 Gb/s的高数据速率，低能耗低于7 pJ/bit。与最快的基于VCSEL的数据传输71 Gb/s相比，速度提高了> 1.6倍，能效提高了> 1.9倍。

In the DUET project, we want to develop novel concepts and integrated drivers for the direct modulation of vertical-cavity surface-emitting lasers (VCSELs) with a duobinary signal, which massively improves the performance of optical transmitters and paves the way for next generation optical short-range data communication systems.To accommodate the increasing Internet data traffic, induced by the progress of Internet services and the development of 5G, 6G and the Internet of Things, short-range optical interconnects based on VCSELs have gained huge attention in the last decade. While VCSELs enable low-cost and power-efficient data transmission, with bandwidths of below 30 GHz, they limit the transmitted non-return-to-zero (NRZ) data rate to approximately 40 Gb/s. Therefore, techniques to overcome this limitation have been proposed. Pulse amplitude modulation with four levels (PAM-4) can double the NRZ data rate, but comes along with increased system complexity, power penalty and reduced tolerance to noise and nonlinearity. The fastest VCSEL-based data transmission of 71 Gb/s was achieved by using signal equalization. However, this comes at the cost of high energy consumption of 13.4 pJ/bit. For optical data rates above 71 Gb/s, no integrated VCSEL-drivers exist today.Duobinary is a 3-level modulation, which is twice as spectrally efficient as NRZ. Compared to PAM-4, it offers a simpler as well as a more energy-efficient implementation and is more tolerant to noise and nonlinearities. It has been mainly applied in copper-based links and also in long-range optical links with 100 Gb/s. However, very often laboratory instruments or offline digital signal processing is used to generate the duobinary signal, which is not suitable for a system implementation with low power consumption. For VCSEL-based links almost no works on duobinary modulation are available and only one integrated VCSEL driver at 5 Gb/s was reported. In DUET, we will design novel VCSEL-based transmitters with integrated duobinary drivers in the fastest available SiGe BiCMOS technology, which offers transistors with 500 GHz maximum oscillation frequency. Three VCSEL drivers will be designed incorporating a duobinary pre-/encoder, an equalized duobinary driver and an encoder-less duobinary driver. Furthermore, performance and power adaptivity will be investigated, by using our innovative method of simultaneous tuning of bias currents and load resistances. Starting with intensive system simulations, including behavioral models of current high-speed VCSELs, and finalizing with the verification of designed hardware drivers, we intend to find the best trade-offs for high data rates of up to 116 Gb/s at low energy consumption of below 7 pJ/bit. This is a >1.6X improvement in speed and a >1.9X improvement in energy efficiency compared to the fastest state-of-the-art VCSEL-based data transmission of 71 Gb/s.