Integrated duobinary VCSEL driver for ultra-fast short-range electro-optical transmitters (DUET)

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In the DUET project, we want to develop novel concepts and integrated drivers for the direct modulation of vertical-cavity surface-emitting lasers (VCSELs) with a duobinary signal, which massively improves the performance of optical transmitters and paves the way for next generation optical short-range data communication systems.To accommodate the increasing Internet data traffic, induced by the progress of Internet services and the development of 5G, 6G and the Internet of Things, short-range optical interconnects based on VCSELs have gained huge attention in the last decade. While VCSELs enable low-cost and power-efficient data transmission, with bandwidths of below 30 GHz, they limit the transmitted non-return-to-zero (NRZ) data rate to approximately 40 Gb/s. Therefore, techniques to overcome this limitation have been proposed. Pulse amplitude modulation with four levels (PAM-4) can double the NRZ data rate, but comes along with increased system complexity, power penalty and reduced tolerance to noise and nonlinearity. The fastest VCSEL-based data transmission of 71 Gb/s was achieved by using signal equalization. However, this comes at the cost of high energy consumption of 13.4 pJ/bit. For optical data rates above 71 Gb/s, no integrated VCSEL-drivers exist today.Duobinary is a 3-level modulation, which is twice as spectrally efficient as NRZ. Compared to PAM-4, it offers a simpler as well as a more energy-efficient implementation and is more tolerant to noise and nonlinearities. It has been mainly applied in copper-based links and also in long-range optical links with 100 Gb/s. However, very often laboratory instruments or offline digital signal processing is used to generate the duobinary signal, which is not suitable for a system implementation with low power consumption. For VCSEL-based links almost no works on duobinary modulation are available and only one integrated VCSEL driver at 5 Gb/s was reported. In DUET, we will design novel VCSEL-based transmitters with integrated duobinary drivers in the fastest available SiGe BiCMOS technology, which offers transistors with 500 GHz maximum oscillation frequency. Three VCSEL drivers will be designed incorporating a duobinary pre-/encoder, an equalized duobinary driver and an encoder-less duobinary driver. Furthermore, performance and power adaptivity will be investigated, by using our innovative method of simultaneous tuning of bias currents and load resistances. Starting with intensive system simulations, including behavioral models of current high-speed VCSELs, and finalizing with the verification of designed hardware drivers, we intend to find the best trade-offs for high data rates of up to 116 Gb/s at low energy consumption of below 7 pJ/bit. This is a >1.6X improvement in speed and a >1.9X improvement in energy efficiency compared to the fastest state-of-the-art VCSEL-based data transmission of 71 Gb/s.