Design of a Gigabit RSA encryption processor based on redundant binary arithmetic

(1)流水线架构设计为了提高基于冗余二进制算法和表查找的四RSA加密处理器的运算速度，研究了流水线架构的引入。a .加法器二叉树结构与流水线结构相结合的结构：在这种结构中，加法器二叉树结构的一部分作为流水线单元，各单元以流水线结构的形式顺序连接。通过这种结构，只要对原有的结构稍加修改，就可以实现对不连续输入和连续输入的更高速度的加密。b .可重构结构：在这种结构中，只对不连续输入形成二叉树结构，对连续输入依次形成流水线结构。c .将流水线运算应用于2N周期运算的体系结构：在这种结构中，流水线运算应用于RSA加密算法中2N周期重复的乘法和残数计算。通过这种架构，如果使用集成度极高的VLSI芯片，就可以实现最高速度的加密，因为所有的RSA加密操作都完全采用流水线操作。(2)利用日本千兆网络进行远程控制实验构建了一个利用日本千兆网络部分网络进行视频图像传输的实验系统。利用该系统，明确了单包传输的平均延迟时间。

(1)Design of pipeline architecturesTo enhance the operation speed o four RSA encryption processor based on redundant binary arithmetic and table-look-up, the introduction of pipelined architectures has been studied. Three architectures are presented as follows.A.Architecture combining a binary tree structure of adders with a pipelined structure:In this structure, a part of the binary tree structure of adders is taken as a pipelined unit, and the units are sequentially connected in the form of a pipelined structure. By this structure, a higher speed encryption can be realized for both discontinuous and continuous input by slight modification of the prior architecture.B.Reconfigurable architecture:In this architecture, the binary tree structure is formed only for discontinuous input, and the pipelined structure is formed only for continuous input in turn. By this architecture, the best structure can be applied to both discontinuous and continuous input.C.Architecture applying pipelined operation to 2N cycle operations:In this structure, the pipelined operation is applied to the 2N cycle repetition ofmultiplication and residue calculation in the RSA encryption algorithm. By this architecture, the highest speed encryption can be realized because pipelined operation is fully applied to all over the RSA encryption operations if a VLSI chip with an extremely high integration can be used.(2)Experiments on the remote control using Japan Gigabit NetworkAn experimental system for video image transfer via a part of Japan Gigabit Network is constructed. Using this system, the average delay time for single packet transfer is made clear.