Research on Metal-Gate, High-Permittivity Gate-Insulator, Metal-Substrate SOI CMOS LSI

金属栅、高介电常数栅绝缘体、金属衬底SOI CMOS LSI的研究

• 批准号: 05402039
• 负责人: OHMI Tadahiro
• 金额: $ 23.04万
• 依托单位: Tohoku University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for General Scientific Research (A)
• 财政年份: 1993
• 资助国家: 日本
• 起止时间: 1993 至 1994
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-05402039/
• 关键词: metal-gate; high-permittivity gate-insulator; metal-substrate; contact resistance; copper interconnect; SOI MOSFET; threshold voltage; SOIデバイス; CMOS; メタルゲート; 高誘電率絶縁膜; 超高速LSI; 低抵抗コンタクト; タンタルゲート; SOI; メタルゲートMOS; 超LSI; 高誘電体膜; コンタクト; イオンビーム

The purpose of this research project is to develop an ideal device structure for use in ultra-fast and ultra-high-density integrated circuits, i.e., metal-gate, high-permittivity gate-insulator, metal-substrate SOI CMOS LSI.The device structures were optimized by using advanced device simulator. It was revealed that the high-dopant-concentration under the source/drain region make it possible to suppress short-channel effects for sub-0.1mum-channel length devices. Furthermore, the excellent current drive of the device was obtained by employing around 10nm-SoI films with low-dopant-concentration and tantalum oxide as high-permittivity gate insulator. In order to achieve the highest current drive, it is essential to reduce parasitic resistance. Therefore, we proposed a new structure in which metal electrode contacts are made with the vertical side walls of source and drain.As one of the high-performance LSI fabrication process technologies, silicon-capping silicidation technology for ultr … More a-low contact resistance metallization was established, resulting in 10^<-9> OMEGAcm^2, which is about two orders of magnitude lower than the value of conventional technology. This is almost identical to the theoretical limit of metal/Si contacts. Copper films were grown at low-kinetic-energy plasma process, and the control of ion-bombardment energy and the post-annealing treatment made it possible to form giant-grain copper, and then highly-reliable copper interconnect technology was established. The electro- and stress-migration life times of these Cu interconnects are three orders of magnitude larger than that of conventional Al interconnects. Total low-temperature processing (low-temperature gate oxidation, low-temperature silicon epitaxy, 450ﾟC annealing of ion-implanted layrs, low-temperature glass reflow for planarization, and so forth) was also established. We have succeeded for the first time in growing high-integrity gate oxide films at such a low temperature at 450ﾟC.In SOI MOSFET's with 1V power supply, it is essential to adjust the threshold voltage based on the work function of a gate material. SOI MOSFETs were made with Ta as a gate material, whose Fermi level is located at the center of silicon band gap. It was experimentally shown that the threshold voltage of both n-type and p-type SOI MOSFET can be controlled by employing Ta as gate material. Less

本研究计画的目的是开发一种适用于超快速超高密度积体电路的理想元件结构，金属栅、高介电常数栅-绝缘体、金属衬底SOI CMOS大规模集成电路，并利用先进的器件模拟软件对器件结构进行了优化。结果表明，源/漏区下的高掺杂浓度使亚0. 1 μ m沟道长度的器件能够抑制短沟道效应。此外，通过采用约10 nm的低掺杂浓度的SOI薄膜和氧化钽作为高介电常数的栅极绝缘体，获得了器件的优良的电流驱动。为了实现最高电流驱动，必须降低寄生电阻。因此，我们提出了一种新的结构，在这种结构中，金属电极接触与源极和漏极的垂直侧壁形成。 ...更多信息 建立了低接触电阻金属化，结果为10^<-9>OMEGAcm ^2，比传统技术的值低约两个数量级。这几乎与金属/Si接触的理论极限相同。采用低动能等离子体技术生长铜膜，通过控制离子轰击能量和后退火处理，使铜膜形成巨晶粒，从而建立了高可靠性的铜互连技术。这些铜互连的电迁移和应力迁移寿命比传统的铝互连大三个数量级。还建立了全低温工艺（低温栅极氧化、低温硅外延、离子注入层的450 ℃退火、用于平坦化的低温玻璃回流等）。我们首次成功地在450 ℃的低温下生长出高完整性的栅氧化膜。在1V电源的SOI MOSFET中，根据栅材料的功函数调节阈值电压是至关重要的。SOI MOSFET采用Ta作为栅极材料制成，其费米能级位于硅带隙中心。实验结果表明，采用Ta作为栅材料，可以控制n型和p型SOI MOSFET的阈值电压。少

项目成果

T.Ohmi: "Trend for Future Silicon Technology" Digest of Papers, MicroProcess '94 (The 7th International MicroProcess Conference). Taiwan, July. 48-49 (1994)

T.Ohmi：“未来硅技术的趋势”论文摘要，MicroProcess 94（第七届国际微处理会议）。

T.Takewaki, H.Yamada, T.Shibata T.Ohmi, and T.Nitta: "Migration Reliability Testing of Giant-Grain Copper Interconnects by a Pulsed-Current Stressing Technique" Technical Report of IEICE,Workshop on Process and Devices of Scaled LSI's. SDM94-56, July. 79-

T.Takewaki、H.Yamada、T.Shibata T.Ohmi 和 T.Nitta：“采用脉冲电流应力技术对巨晶粒铜互连进行迁移可靠性测试”IEICE 技术报告，规模化工艺和设备研讨会

N.Konishi, Y.Kawai, J.Watanabe and T.Ohmi: "Application of Dual-Frequency-Excitation Plasma Processing Equipment to High-Integrity ULSI Fabrication Processes" Proceeding, International Conference on AMDP (Advanced Microelectronics Devices and Processing),

N.Konishi、Y.Kawai、J.Watanabe 和 T.Ohmi：“双频激励等离子体处理设备在高完整性 ULSI 制造工艺中的应用”论文集，AMDP（先进微电子器件和处理）国际会议，

K.Yamada, K.Tomita and T.Ohmi: "Silicon-Capping Silicidation Technology for Ultra-Low Contact Resistance Metallization" Proceeding, International Conference on AMDP (Advanced Microelectronics Devices and Processing), Sendai. March. 501-506 (1994)

K.Yamada、K.Tomita 和 T.Ohmi：“用于超低接触电阻金属化的硅覆盖硅化技术”论文集，AMDP（先进微电子器件和加工）国际会议，仙台。

K.Yamada, K.Tomita and T.Ohmi: "Ultra-Low Contact Resistance Metallization by A Silicidation Technology Employing A Silicon Capping Layr for Protection against Contamination" Digest of Technical Papers, 1994 Symposium on VLSI Technology, Honolulu. June. 6

K.Yamada、K.Tomita 和 T.Ohmi：“采用硅化技术实现超低接触电阻金属化，采用硅覆盖层防止污染”，技术论文摘要，1994 年 VLSI 技术研讨会，檀香山。