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Metal-substrate SOI integrated circuits technologies for 10GHz clock operation

Metal-substrate SOI integrated circuits technologies for 10GHz clock operation
用于 10GHz 时钟操作的金属衬底 SOI 集成电路技术
批准号:
10305022
负责人:
OHMI Tadahiro
金额:
$22.78万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (A)
财政年份:
1998
资助国家:
日本
项目状态:
已结题
起止时间:
1998 至 1999

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中文摘要
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英文摘要
The purpose of this research project is to develop an ideal device structure for use in ultra-fast and ultra-high-density integrated circuit, I.e., gas isolated interconnect structure, metal-gate, high-permittivity gate insulator, metal-substrate SOI CMOS LSI. These technologies will increase integrated circuits operating frequency up to 20 GHz although 1 GHz was recognized as the upper limit in the present technology. In order to establish this device structure as industrial products, we have developed several excellent technologies based on the ultraclean processing concept, as follows :I) Low-temperature Si epitaxial growth technology, II) Kr/OィイD22ィエD2 low-temperature oxidation technology, III) SiィイD23ィエD2NィイD24ィエD2 gate dielectric formation technology by microwave excited high-density plasma, IV) Low-temperature ultra-shallow source/drain junction formation technology, V) Low-resistivity bcc-phase Ta gate electrode formation technology by Xe plasma sputtering, VI) Giant-grain copper interconnects technology using TaNィイD22ィエD2 diffusion barrier layer, VII) Low-resistivity tantalum-silicided junction formation technology using Si-encapsulated silicidation technique, VIII) characterization technique of electrically active interface defects for SOI MOS device.These results lead not only to the realization of ultrahigh-speed devices but also to the establishment of a number of advanced processing technologies which certainly will become the main stream in microelectronics in sub-100 nm era, impacting greatly the semiconductor manufacturing technology in future.
期刊论文(24)
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会议论文
T.Ohmi: "Formation of Ultra-Shallow and Low-reverse-bias-current Tantalum-silicided Junctions Using a Si-Ea capsulated Silicidation Techniyus"Jpn.J.Appl.Phys.. 87. 4277-4283 (1998)
T.Ohmi:“使用 Si-Ea 封装的硅化技术形成超浅和低反向偏压钽硅化结”Jpn.J.Appl.Phys.. 87. 4277-4283 (1998)
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T.Ohmi: "Gate Oxide Reliability Concerns in Gate-Metal Sputtering Deposition Process: An Effect of Low-Energy Large-Mass Ion Bombardment"Microelectronics Reliability. 39・3. 327-332 (1999)
T.Ohmi:“栅极金属溅射沉积过程中的栅极氧化物可靠性问题:低能量大质量离子轰击的影响”微电子可靠性39・3。
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T. Ohmi: "Gate Oxide Reliability Concerns in Gate-Metal Sputtering Deposition Process : and Effect of Low-Energy Large-Mass Ion Bombardment"Microelectronics Reliability. Vol. 39, No. 3. 327-332 (1999)
T. Ohmi:“栅极金属溅射沉积过程中的栅极氧化物可靠性问题:以及低能大质量离子轰击的影响”微电子可靠性。
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23
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