Metal-substrate SOI integrated circuits technologies for 10GHz clock operation
用于 10GHz 时钟操作的金属衬底 SOI 集成电路技术
基本信息
- 批准号:10305022
- 负责人:
- 金额:$ 22.78万
- 依托单位:
- 依托单位国家:日本
- 项目类别:Grant-in-Aid for Scientific Research (A)
- 财政年份:1998
- 资助国家:日本
- 起止时间:1998 至 1999
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
The purpose of this research project is to develop an ideal device structure for use in ultra-fast and ultra-high-density integrated circuit, I.e., gas isolated interconnect structure, metal-gate, high-permittivity gate insulator, metal-substrate SOI CMOS LSI. These technologies will increase integrated circuits operating frequency up to 20 GHz although 1 GHz was recognized as the upper limit in the present technology. In order to establish this device structure as industrial products, we have developed several excellent technologies based on the ultraclean processing concept, as follows :I) Low-temperature Si epitaxial growth technology, II) Kr/OィイD22ィエD2 low-temperature oxidation technology, III) SiィイD23ィエD2NィイD24ィエD2 gate dielectric formation technology by microwave excited high-density plasma, IV) Low-temperature ultra-shallow source/drain junction formation technology, V) Low-resistivity bcc-phase Ta gate electrode formation technology by Xe plasma sputtering, VI) Giant-grain copper interconnects technology using TaNィイD22ィエD2 diffusion barrier layer, VII) Low-resistivity tantalum-silicided junction formation technology using Si-encapsulated silicidation technique, VIII) characterization technique of electrically active interface defects for SOI MOS device.These results lead not only to the realization of ultrahigh-speed devices but also to the establishment of a number of advanced processing technologies which certainly will become the main stream in microelectronics in sub-100 nm era, impacting greatly the semiconductor manufacturing technology in future.
本研究项目的目的是开发一种用于超快速、超高密度集成电路的理想器件结构,即气体隔离互连结构、金属栅极、高介电常数栅极绝缘体、金属衬底SOI CMOS LSI。这些技术将把集成电路的工作频率提高到20 GHz,尽管目前的技术中公认的上限是1 GHz。为了建立这个设备结构作为工业产品,我们开发了基于超净处理的几个优秀的技术概念,如下:1)低温硅外延生长技术,2)Kr / OィイD22摊位ィエD2低温氧化技术,3)如果ィイc15ィエD2NィイD24ィエD2栅极绝缘层形成由微波兴奋高密度等离子体技术,(四)低温超浅源/排水结形成技术,V) Xe等离子溅射低电阻率bcc相Ta栅电极形成技术,VI)利用TaN γ γ γ扩散势垒层的大晶粒铜互连技术,VII)利用si封装硅化技术的低电阻率钽硅化结形成技术,VIII) SOI MOS器件电活性界面缺陷表征技术。这些成果不仅实现了超高速器件,而且建立了一系列先进的加工技术,这些技术必将成为亚100纳米时代微电子技术的主流,对未来的半导体制造技术产生重大影响。
项目成果
期刊论文数量(24)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
T.Ohmi: "Formation of Ultra-Shallow and Low-reverse-bias-current Tantalum-silicided Junctions Using a Si-Ea capsulated Silicidation Techniyus"Jpn.J.Appl.Phys.. 87. 4277-4283 (1998)
T.Ohmi:“使用 Si-Ea 封装的硅化技术形成超浅和低反向偏压钽硅化结”Jpn.J.Appl.Phys.. 87. 4277-4283 (1998)
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- 影响因子:0
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- 通讯作者:
T.Ohmi: "Gate Oxide Reliability Concerns in Gate-Metal Sputtering Deposition Process: An Effect of Low-Energy Large-Mass Ion Bombardment"Microelectronics Reliability. 39・3. 327-332 (1999)
T.Ohmi:“栅极金属溅射沉积过程中的栅极氧化物可靠性问题:低能量大质量离子轰击的影响”微电子可靠性39・3。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
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- 通讯作者:
T. Ohmi: "Thin and Low-Resistivity Tantalum Nitride Diffusion Barrier and Giant-Grain Copper Interconnects for Advanced ULSI Metallization"Jpn. J. Appl. Phys.. Vol. 3, Part 1, No. 4B. 2401-2405 (1999)
T. Ohmi:“用于高级 ULSI 金属化的薄且低电阻率氮化钽扩散势垒和巨晶粒铜互连”Jpn。
- DOI:
- 发表时间:
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- 影响因子:0
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T. Ohmi: "Gate Oxide Reliability Concerns in Gate-Metal Sputtering Deposition Process : and Effect of Low-Energy Large-Mass Ion Bombardment"Microelectronics Reliability. Vol. 39, No. 3. 327-332 (1999)
T. Ohmi:“栅极金属溅射沉积过程中的栅极氧化物可靠性问题:以及低能大质量离子轰击的影响”微电子可靠性。
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- 影响因子:0
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T.Ohmi: "Improvement of Gate Oxide Reliability for Tantalum-Gate MOS Devices Using Xenon Plasma Sputtering Technology"IEEE Trans. On Electron Devices. 45.11. 2349-2354 (1998)
T.Ohmi:“使用氙等离子体溅射技术提高钽栅 MOS 器件的栅氧化物可靠性”IEEE Trans。
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- 影响因子:0
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OHMI Tadahiro其他文献
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{{ truncateString('OHMI Tadahiro', 18)}}的其他基金
Study on fabrication process of 3-D structured MOS transistor having atomically flat gate insulator/Si interface
具有原子级平坦栅绝缘体/Si界面的3D结构MOS晶体管制作工艺研究
- 批准号:
22000010 - 财政年份:2010
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Specially Promoted Research
Balanced Full CMOS LSI for Ultra High Performance and Ultra Low PowerConsumption
平衡的全 CMOS LSI,实现超高性能和超低功耗
- 批准号:
18002004 - 财政年份:2006
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Specially Promoted Research
Ultra-High-Speed and High-Precision Integration Circuit Using Si(110) Surface Metal Substrate SOI Balanced-CMOS
采用Si(110)表面金属衬底SOI平衡-CMOS的超高速高精度集成电路
- 批准号:
14205052 - 财政年份:2002
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research (A)
Plasma process technology controlling dissociation of process gas for realizing step-by-step investment semiconductor manufacturing
控制工艺气体解离的等离子体工艺技术,实现分步投资半导体制造
- 批准号:
12355014 - 财政年份:2000
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research (A)
Development of ultra-high-speed LSI with gas-isolated-interconnects and Ta metal gate transistors on SOI substrate
SOI基板上气体隔离互连和Ta金属栅极晶体管的超高速LSI的开发
- 批准号:
12305020 - 财政年份:2000
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research (A)
Ultra-High-Speed Real-Time Processing Circuit and Algorithm
超高速实时处理电路和算法
- 批准号:
12044202 - 财政年份:2000
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research on Priority Areas
Ultimate Integration of Intelligence on Silicon Electronic Systems
硅电子系统智能的终极集成
- 批准号:
07248101 - 财政年份:1999
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research on Priority Areas (A)
Mixed Integrated Systems for Real-Time Intelligent Processing
用于实时智能处理的混合集成系统
- 批准号:
11176101 - 财政年份:1999
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research on Priority Areas
Scientific LSI Processing for Intelligent Electronic Systems
智能电子系统的科学LSI处理
- 批准号:
10044114 - 财政年份:1998
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for Scientific Research (B).
HIGH PERFORMANCE DEVICES FOR GIGASCALE INTEGRATED SYSTEMS
适用于千兆级集成系统的高性能设备
- 批准号:
07044111 - 财政年份:1995
- 资助金额:
$ 22.78万 - 项目类别:
Grant-in-Aid for international Scientific Research
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