Development of Educational Microprocessors for Computer Science Education

计算机科学教育用教育微处理器的开发

• 批准号: 06558043
• 负责人: YASUURA Hiroto
• 金额: $ 11.58万
• 依托单位: Kyushu University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Developmental Scientific Research (B)
• 财政年份: 1994
• 资助国家: 日本
• 起止时间: 1994 至 1995
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-06558043/
• 关键词: educational microprocessor; hardware education; software education; computer engineering education; FPGA; LSI design education; experiment curriculum; computer architecture; LSI設計; アーキテクチャ

Current computer education curricula of universities and higher educational institutes put emphasis on computer literacy and programming, and it is not sufficient for understanding the total picture of computer systems, from software to hardware, and principles of computing mechanisms. This research project is aimed at developing microprocessor systems suitable for education of computer science, and designing course curricula for systematic education of computer systems, utilizing those educational microprocessors. Our achievements are summarized below :1.32-bit RISC educational microprocessors : We have developed QP-DLX (Kyushu Univ.) and DLX-FPGA (Kyushu Inst. Tech.) ; both microprocessors have modern architectures such as 32-bit RISC, instruction pipeline, and exception handling. They also have educational features such as observability of internal processor states.2. FPGA educational microprocessors : FPGA is a reconfigurable device and it can be used for implementing student-designed microprocessors in classrooms. We have developed several FPGA microprocessor boards for different education levels. DLX-FPGA is a 32-bit microprocessor suitable for graduate microprocessor design projects, and a model curriculum using DLX-FPGA is also developed for design courses using hardware description languages. PICO (Keio Univ.) is suitable for entry-level computer education and its curriculum takes account of use in classes of a large number of students.3. Public release of design data and benchmarks : Various design data, documents, and course texts developed in this project, together with CAD benchmarks, are released for public use through the Internet.

目前大学和高等教育机构的计算机教育课程强调计算机知识和编程，这不足以理解计算机系统的全貌，从软件到硬件，以及计算机制的原理。本研究课题的目的是开发适合于计算机科学教育的微处理器系统，并利用这些教育用微处理器设计计算机系统系统教育的课程。1.32位RISC教育微处理器：我们开发了QP-DLX（九州大学）和DLX-FPGA（九州理工大学）这两个微处理器都有现代的体系结构，如32位RISC、指令流水线和异常处理。它们还具有教育功能，例如内部处理器状态的可观察性。FPGA教育微处理器：FPGA是一种可重新配置的设备，可用于在教室中实现学生设计的微处理器。我们已经开发了几个FPGA微处理器板，用于不同的教育水平。DLX-FPGA是一款适合于研究生微处理器设计项目的32位微处理器，并为使用硬件描述语言的设计课程开发了使用DLX-FPGA的模型课程。皮科（庆应义塾大学）适用于入门级计算机教育，其课程考虑到在大量学生的班级中使用。设计数据和基准的公开发布：本项目开发的各种设计数据、文档和课程文本，以及CAD基准，通过互联网公开发布。

项目成果

T.Sueyoshi, H.Inoue, et al.: ""Development of Educational 32-bit RISC Microprocessor DLX-FPGA and its Processor Board, "" Proc.3rd FPGA/PLD Conference & Exhibit. 579-595 (1995)

T.Sueyoshi、H.Inoue 等人：“教育用 32 位 RISC 微处理器 DLX-FPGA 及其处理器板的开发”，Proc.3rd FPGA/PLD 会议

A.Hirata, H.Onodera, and K.Tamaru: ""Estimation of Short Circuit Power Dissipation for Static CMOS Gates, "" IEICE Trans.Fundamentals. Vol.E79-A, No.3. (1996)

A.Hirata、H.Onodera 和 K.Tamaru：“静态 CMOS 门的短路功耗估计”，IEICE Trans.Fundamentals。

末吉敏則、井上弘士 他: "教育用32ビットRISCマイクロプロセッサDLX-FPGAと教育ボードの開発" 第3回FPGA/PLD Conference & Exhibit論文集. 579-595 (1995)

Toshinori Sueyoshi、Hiroshi Inoue 等人：“教育型 32 位 RISC 微处理器 DLX-FPGA 和教育板的开发”第三届 FPGA/PLD 会议暨展览论文集 579-595 (1995)。

H.Kambara, and H.Yasuura: ""KUE-CHIP2 : A Microprocessor for Education of LSI Design, "" Proc.Synthesis and System Integration of Mixed Technologies (SASIMI '95). 233-240 (1995)

H.Kambara 和 H.Yasuura：“KUE-CHIP2：用于 LSI 设计教育的微处理器”，混合技术的 Proc.Synthesis 和系统集成 (SASIMI 95)。

M.Okumura, N.Yokoo, et al.: ""Design and Implementaion of the Educational Microprocessor KITE using Gate Array with Full Synthesis, "" Proc.SASIMI '95. 219-226 (1995)

M.Okumura、N.Yokoo 等人：“使用全合成门阵列设计和实现教育微处理器 KITE”，Proc.SASIMI 95。