Research on High-Level Information Extraction in Integrated Circuit Design
Research on High-Level Information Extraction in Integrated Circuit Design
批准号:
02650264
负责人:
YASUURA Hiroto
金额:
$1.86万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (C)
财政年份:
1990
资助国家:
日本
项目状态:
已结题
起止时间:
1990 至 1991
中文摘要
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英文摘要
The goal of this research project is to establish a basic meibodology for functional infoffnadon extraction from logic circuits. The target problem is inverse transformation of logic synthesis. The obtained results of this research are summarized as follows :1. We developed a method to extract furiclional information from combinational logic circuits. In this method, we use a Binary Decision Diagram(BDD)as a basic data structure. We also use additional information added to a net list of a logic circuit. The additional information consists of types of signal lines and coding scheme of numerical data and characters. Using the additional information. we can extract arithmetic functions like addition or multiplication, as well as logical operations. Our approach is independent from structure of a circuit from which functional information is extracted. We developed a prototype system of functional information extraction, called FINES, and extend the method to functional information extraction from sequential circuits.2. We developed a system to extract functional information from descriptions of transister level circuits. Combining the established technology to extract circuits from layout information, we can develop a system to extract functional information from layout descriptions. This method is independent from libraries of logic elements.3. We discussed applications of the functional information extraction technique to automatic generation of functional simulation models, design verification, test generation and computer aided documentation.All the above results have been published or presented in journals, international conferences and workshops. The methodology developed in the research can be applied to analog circuits and software engineering area. The fundamental problem of fundonal information extraction is recognition of the function or behavior from static descriptions. This seems to be one of the basic problems of inforinadon sciences.
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淡海 功二: "“UDL/Iのセマンティック定義に基づく可変精度シミュレ-タの試作"" 第4回回路とシステム軽井沢ワ-クショップ論文集. 57-62 (1991)
Koji Ami:“基于 UDL/I 语义定义的可变精度模拟器原型”,第四届电路与系统轻井泽研讨会论文集 57-62 (1991)。
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通讯作者:
Masahiko Ohmura: "Extraction of Arithmetic Functions from Combinational Circuits" Proceedings of the Synthesis and Simulation Meeting and International Interchange SASIMI'90. 40-47 (1990)
Masahiko Ohmura:“从组合电路中提取算术函数”综合与仿真会议及国际交流 SASIMI90 论文集。
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通讯作者:
Masahiko Ohmura: "Extraction of Functional Information from Combinational Circuits" Proceedings of IEEE International Conference on ComputerーAided Design ICCAD'90. 176-179 (1990)
Masahiko Ohmura:“从组合电路中提取功能信息”IEEE 国际计算机辅助设计会议 ICCAD90 论文集(1990 年)。
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作者:
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通讯作者:
Masahiko Ohmura: ""Extraction of Arithmetic Functions from Combinational Circuits"" Proceedings of the Synthesis and Simulation Meeting and International Interchange SASIMI'90. 40-47 (1990)
Masahiko Ohmura:“从组合电路中提取算术函数”综合与模拟会议和国际交流 SASIMI90 的会议记录。
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通讯作者:
大村 昌彦: "“組合せ回路の機能情報抽出"" 電子情報通信学会論文誌. J74ーA. 247-255 (1991)
Masahiko Omura:“组合电路的功能信息提取”,电子、信息和通信工程师学会汇刊 J74-255 (1991)。
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共 17 条
Research on Design Methodology of Dependable LSI Loading Value and Trust
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批准号:19200004
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项目类别:Grant-in-Aid for Scientific Research (A)
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资助金额:$30.45万
-
财政年份:2007
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负责人:YASUURA Hiroto
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依托单位:
Development of High-performance Low-power Processor Systems
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批准号:13023208
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项目类别:Grant-in-Aid for Scientific Research on Priority Areas
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资助金额:$40.32万
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财政年份:2000
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负责人:YASUURA Hiroto
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依托单位:
The Development of Basic Software Techniques for Variable-Voltage Processors Targeting Low-Energy Consumption
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批准号:12558029
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$8.51万
-
财政年份:2000
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负责人:YASUURA Hiroto
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依托单位:
A Study on Delay and Function Test for Core-Based System LSIs
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批准号:11450143
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$8.45万
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财政年份:1999
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负责人:YASUURA Hiroto
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依托单位:
Research on Low-Power Design of Microprocessor Systems.
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批准号:09480057
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$8.38万
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财政年份:1997
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负责人:YASUURA Hiroto
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依托单位:
Development of Curriculums for Education of VLSI System Design.
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批准号:08558025
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项目类别:Grant-in-Aid for Scientific Research (A)
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资助金额:$12.67万
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财政年份:1996
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负责人:YASUURA Hiroto
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依托单位:
Research on Performance Evaluation Technology for High-Performance Computer Systems
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批准号:07458063
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$4.74万
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财政年份:1995
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负责人:YASUURA Hiroto
-
依托单位:
Development of Educational Microprocessors for Computer Science Education
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批准号:06558043
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项目类别:Grant-in-Aid for Developmental Scientific Research (B)
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资助金额:$11.58万
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财政年份:1994
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负责人:YASUURA Hiroto
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依托单位:
Research on Logic Synthesis and Hardware Description Language Considering Layout Design
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批准号:04452198
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项目类别:Grant-in-Aid for General Scientific Research (B)
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资助金额:$4.54万
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财政年份:1992
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负责人:YASUURA Hiroto
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依托单位:
海外基金