The Development of Basic Software Techniques for Variable-Voltage Processors Targeting Low-Energy Consumption

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This work discusses some basic techniques of software for variable-voltage processors in order to realize low-energy design, together with modeling techniques and evaluations of their potential benefits by simulation. Details are listed as follows :1) A task scheduling technique for a real-time system with a variable-voltage processor, by which supply voltage is changed dynamically, is presented.2) A platform for datapath width optimization of soft-core processors is built and the presented methodology of datapath optimization is evaluated by using MPEG AAC decoder. In addition, an energy minimization methodology using datapath width optimization is proposed. To find the optimized datapath width for a given application in the early phase of designs, an effective bitwidth and access frequency of variables based performance estimation technique is also developed. A low-energy memory design technique is presented as well.3) A new datapath width optimization methodology considering computation precision targeting area and power reduction is presented.4) A power reduction technique by reducing switching of redundant bit is presented, here effective bit line on data bus is called active bit, the other bit is called redundant bit.5) A cost model for SoC (System on a Chip), in which each cost as a parameter is presented, and a design method by market scale and number of products is also presented.6) High-performance/low power cache architectures with variable cache-line size for merged DRAM/Logic LSIs are presented ; in addition, a low-power instruction cache architecture exploiting program execution footprints is presented.