Evaluation of Defects in Crystal Silicon Film with SOI (Silicon on Insulator) Structure

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In this study, we have established an electrical evaluation technique of defects in crystal silicon film with SOI (silicon on insulator) structure and performed the characterization of the defects in silicon. The results are summarized as follows :1. we have constrcuted the basic detection priciple to get the information from defects and proposed a method for estimating energy level and the concentration of defect.2. We have succeeded in the fabrication of current DLTS system with high sensitivity.3. The current DLTS system has been applied a gold-doped p^+n junction diode. It is confirmed that the current DLTS is useful as well as capacitance DLTS.4. The current DLTS system has been applied for SOS (silicon on sapphire) substrate. The obtained signals is very broad, which implies that the signal consists of many defect species. The main defect levels are located at E_c-0.123 and 0.333 eV.Futhermore, it is shown that current DLTS is very useful as electrical evaluation of defects in thin films, because any signal cannot be observed by capacitance DLTS.5. The current DLTS system has been applied for SIMOX (separation by implanted oxygen) substrate. As well as SOS,the obtained signals is broad. The main defect level is located at E_v+0.15 eV.