Floorplan-base Design Environment Technologies for Large-Scale System LSIs

用于大规模系统LSI的基于布局的设计环境技术

• 批准号: 23560417
• 负责人: YOSHIMURA Takeshi
• 金额: $ 3.24万
• 依托单位: Waseda University
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2011
• 资助国家: 日本
• 起止时间: 2011 至 2013
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-23560417/
• 关键词: 高位レベル合成; フロアプラン; ネットワークオンチップ; 低消費電力設計; 最適化; 高位合成; Floorplanning; Highlevel Synthesis

Aiming at efficient design environments for the large system LSIs, the research on High-level Synthesis and Floorplanning has been done.First, the research on the methods for minimizing power consumption by optimizing the value of the frequency, the power-supply voltage and the threshold voltage of the operation units has been done and new methods based on graph theoretical approach for the linear programming problem, and flow algorithms were developed. Then, a graph theoretical approach for the port assignment problem which is one of the important problems in high-level synthesis was developed. As for the floorplanning problems, floorplanning algorithms for FPGA and 2D/3D Application Specific Network on Chips were developed.

为了针对大型系统LSI的有效设计环境，已经完成了高级合成和平底平面图的研究。首先，通过优化频率的价值，功率供应电压的价值，功率供电电压和操作单元的阈值电压来最大程度地降低功耗的方法的研究，以及基于图形的方法和新方法的方法和新方法。然后，开发了端口分配问题的图理论方法，这是高级合成中重要问题之一。至于平面图问题，开发了FPGA和2D/3D应用程序特定网络的平面图算法。

项目成果

Min-cut based leakage power aware scheduling in high-level synthesis

• DOI: 10.1109/isqed.2013.6523605
• 发表时间: 2013-03
• 期刊: International Symposium on Quality Electronic Design (ISQED)
• 作者: Nan Wang;Song Chen;T. Yoshimura

Mobility overlap-removal based leakage power aware scheduling in high-level synthesis

高级综合中基于移动重叠去除的泄漏功率感知调度

• 发表时间: 2013
• 作者: Nan Wang;Song Chen;Takeshi Yoshimura
• 通讯作者: Takeshi Yoshimura

A novel floorplan representation with random contour corner selecting scheme

一种具有随机轮廓角选择方案的新颖平面图表示

• 发表时间: 2013
• 作者: Xiaohao Gao;Takeshi Yoshimura
• 通讯作者: Takeshi Yoshimura

A Low Power Technology Mapping Method for Adaptive Logic Module

一种自适应逻辑模块低功耗技术映射方法

• 发表时间: 2011
• 作者: Wei Chen;Yuichi Nakamura;Xiaolin Zhang;Takeshi Yoshimura
• 通讯作者: Takeshi Yoshimura

Timing and Resource Constrained Leakage Power Aware Scheduling in High-Level Synthesis

高级综合中的时序和资源约束泄漏功率感知调度

• 发表时间: 2013
• 作者: Nan Wang;Song Chen;Takeshi Yoshimura
• 通讯作者: Takeshi Yoshimura