Floorplan-base Design Environment Technologies for Large-Scale System LSIs

针对大系统LSI的高效设计环境，本文对高层次综合与布图规划进行了研究：首先，研究了通过优化运算单元的频率、电源电压和阈值电压来实现功耗最小化的方法，以及基于图论方法求解线性规划问题的新方法，并开发了流算法。在此基础上，提出了一种解决高层次综合中重要问题之一的端口分配问题的图论方法。针对布图规划问题，研究了FPGA和2D/3D片上专用网络的布图规划算法。

Aiming at efficient design environments for the large system LSIs, the research on High-level Synthesis and Floorplanning has been done.First, the research on the methods for minimizing power consumption by optimizing the value of the frequency, the power-supply voltage and the threshold voltage of the operation units has been done and new methods based on graph theoretical approach for the linear programming problem, and flow algorithms were developed. Then, a graph theoretical approach for the port assignment problem which is one of the important problems in high-level synthesis was developed. As for the floorplanning problems, floorplanning algorithms for FPGA and 2D/3D Application Specific Network on Chips were developed.