Silicon Carbide MOSFETs

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Details of project plan including key milestones - UMOS technology consists of a vertical channel region, adjacent to the usual lateral plane. This rotation will have an impact on the arrangement of atoms at the interface since the structure of 4H-SiC will be off-orientated. A slightly higher mobility should be achieved in this device due to aspects provided by this different orientation.The first milestone will be fabricating UMOS technology with interface trap density values of a magnitude equal to or lower than that seen in SiC oxide layers.A UMOS capacitor will be designed and fabricated with analysis of interface trap density, mobility and hysteresis.Upon success of this milestone, the second milestone will be fabrication of a single UMOS power transistor cell:A UMOSFET will be designed and fabricated. A mask will be designed for this and a DMOS transistor to be on a single wafer. The two technologies characteristics can be directly compared. The UMOS device will be characterised. However, if in the first phase, the UMOS technology shows little promise in its current carrying capability, other team members will be working on design of the DMOSFET and I can join them with the task of characterisation of this device.The third milestone will be carrying out reliability analysis:Assessing the reliability of both power MOSFET devices, addressing potential reliability problems by examining failure probability when the device is operated under certain parameters (such as temperature and current) for a period of time. Summary of the proposed project - Silicon Carbide is a wide band-gap semiconductor with exceptional electrical and other material properties for power electronics applications. But it has very poor MOS current carrying capability and I-V hysteresis. We have shown recently that major (10x) performance improvements can be achieved by nm scale engineering of the gate stack (DOI: 10.1109/TED.2019.2901310). This PhD project will build on this new approach and look at both power MOSFETs I-V performance and reliability. The research will include device fabrication, characterisation and analysis.