Silicon Carbide Trench Refill Epitaxy for Super-Junction High Voltage Power Devices

用于超结高压功率器件的碳化硅沟槽再填充外延

• 批准号: 2678908
• 金额: --
• 依托单位: University of Warwick
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2022
• 资助国家: 英国
• 起止时间: 2022 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-2678908
• 关键词: Silicon; Carbide; Trench; Refill; Epitaxy

Microelectronic device technology - Physical SciencesThe project aims to investigate Silicon Carbide (SiC) superjunction materials and devices for exploitation in 10-15 years as high voltage direct current (HVDC) national grid transmission. It will consist of 1) device modelling using computer simulation, 2) materials fabrication and 3) device construction, all using facilities at Warwick. The particular method to construct SiC superjunction devices will be trench refill epitaxy. Vertical devices made by trench refilling will be subject to doping imbalances caused by local region asymmetry, process misalignments or other deviations from design. Simulation by TCAD software (Centaurus) will be performed to determine how this doping imbalance will affect the RON vs VBR characteristics between non-SJ and SJ devices. Materials fabrication will focus on trench selectivity, precise dopant control, surface planarization, achieving wide process windows and fast growth rates. Challenges in device construction will be incorporating all the knowledge and caveats from previous activities into a standard construction process. This will result in new technologies, which could be included in many power electronics areas. Efficiency, reliability and cost of production will be compared for overall optimization.

微电子器件技术-物理科学该项目旨在研究碳化硅（SiC）超结材料和器件，以在10-15年内开发为高压直流（HVDC）国家电网传输。它将包括1）使用计算机模拟的器械建模，2）材料制造和3）器械构造，所有这些都使用沃里克的设施。构建SiC超结器件的特定方法将是沟槽填充外延。通过沟槽再填充制成的垂直器件将经受由局部区域不对称、工艺未对准或其他设计偏差引起的掺杂不平衡。将通过TCAD软件（Centaurus）进行模拟，以确定这种掺杂不平衡将如何影响非SJ和SJ器件之间的罗恩与VBR特性。材料制造将集中在沟槽选择性，精确的掺杂控制，表面平坦化，实现宽工艺窗口和快速生长速率。设备构建的挑战将是将以前活动中的所有知识和注意事项纳入标准构建过程。这将产生新的技术，这些技术可能包括在许多电力电子领域。效率、可靠性和生产成本将进行比较，以实现整体优化。