CDT Compound Semiconductor Physics (PhD Progression 1+3)

垂直腔面发射激光器(VCSEL)在数据通信、原子钟、激光雷达、人脸/手势识别和增强现实等领域有着广泛的应用。在神经形态计算领域，光脉冲或“尖峰”被用来模拟神经元的放电。如果设计正确，VCSEL还可以用于靶向光敏蛋白(Opsins)，从而激活用于光遗传治疗的生物神经元。将其与为神经形态计算中的尖峰设计的VCSEL相结合，可以提供一条通往神经假体(脑机接口)的有效途径，这是神经科学和生物医学工程的一个令人兴奋的新领域。就个人而言，VCSEL是相对较低的功率发射器(10s MW)，但在阵列或耦合配置中，这种功率可以扩展，尽管有适当的热管理。锗(Ge)衬底的导热系数比砷化镓更高，并允许更薄的衬底进一步帮助热提取，这一领域可以在该项目中探索。根据配置的不同，VCSEL阵列可以稀疏地或密集地组装在一起，这可能会由于对工艺参数的影响而导致器件架构的显著变化，例如“依赖于长宽比的蚀刻”。此外，短脉冲VCSEL中对增益和可饱和吸收部分的需求需要仔细控制刻蚀参数，以满足腔内电接触所需的深度。该项目将专注于优化工艺参数，以实现尖峰或高脉冲功率的VCSEL可寻址阵列，并将使用测试来通知制造方面的改进。此外，还将探索使用等离子体-芯片分离技术分离高密度阵列的方法，对于Ge衬底，由于切割困难，这可能变得至关重要。

Vertical cavity surface emitting lasers (VCSELs) have widespread use in applications such as datacoms, atomic clocks, LiDAR, face/gesture recognition and augmented reality. In the field of neuromorphic computing, optical pulses or 'spiking' is used to imitate the firing of neurons. If designed in the correct way, VCSELs can also be used to target photosensitive proteins (opsins), causing activation of biological neurons used in optogenetic therapy. Combining this with a VCSEL designed for spiking in neuromorphic computing could provide an effective route to neural-protheses (brain-computer interfacing), an exciting new area of neuroscience and biomedical engineering. Individually, VCSELs are relatively low power emitters (10s mW), but in arrays or coupled configurations this power can be scaled, albeit with appropriate thermal management. Germanium (Ge) substrates have a higher thermal conductivity than gallium arsenide and allow for thinner substrates further aiding heat extraction, an area which can be explored in the project. Depending on the configuration, arrays of VCSELs can be sparsely or densely packed together and this can cause significant variation in device architecture due to the impact on process parameters, such as 'aspect-ratio dependant etching'. Additionally, the need for gain and saturable absorber sections in short-pulse VCSELs requires careful control of etching parameters to meet the required depths for intra-cavity electrical contacts. This project will focus on optimising process parameters to achieve addressable arrays of VCSELs for spiking or high pulse-powers and testing will be used to inform improvements in fabrication. Furthermore, routes to separate out dense arrays using plasma-die separation techniques will be explored, in the case of Ge substrates this can become critical due to cleaving difficulties.