An Efficient Page and Object-based Transactional Memory System

高效的页面和基于对象的事务内存系统

• 批准号: EP/E036368/1
• 负责人: Ian Watson
• 金额: $ 75.76万
• 依托单位: University of Manchester
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2007
• 资助国家: 英国
• 起止时间: 2007 至 无数据
• 项目状态: 已结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FE036368%2F1
• 关键词: Efficient; Page; Object; based; Transactional

For the last 25 years, the processor chips inside PCs, games consoles etc. have increased in speed many times over. This is often refereed to as 'Moores Law' which states that this increase will be approximately a factor of 2 every 18 months.However, Moores Law no longer holds for the latest semiconductor technology. Factors such as power dissipation prevent the continued shrinking of electronic circuits on which it depends.Processor manufacturers are therefore turning to 'multi-core' processors to achieve future increases in performance. A core being the circuit of a single processing unit of the structure found in previous computers. It is already possible to buy PCs which have dual cores on a single chip and advanced processors intended for commercial applications have several cores.Unfortunately the techniques required to write programs for these multi-core processors, particularly for general purpose applications, rely on mechanisms to share the memory between processors which require special hardware to ensure that they all see a consistent view of the shared memory over a common communication system.Although it is possible to build such hardware to perform efficiently for small numbers of processors, as the number of processors and the size of the communication system increases, it is impossible to maintain the required speed. This will therefore limit the size of future multi-core systems unless new techniques are found.Transactional Memory is a new approach to writing programs, to make use of multi-core processors, which does not require the same fully consistent view of shared memory. Instead, individual processors work on their own temporary copies of shared memory and reconcile its state at the end of defined tasks. This approach can not only remove the need for complex consistency maintaining mechanisms but also result in methods for writing multi-task programs which are easier to understand.However, Transactional Memory requires organisation specifically to support the maintenance and reconciliation of temporary shared copies. Current proposals to do this have removed some of the restrictions of conventional multi-core systems but introduced others of their own.This project proposes to perform a practical investigation of a novel Transactional Memory scheme which builds upon previous similar work but uses properties particular to the Object Oriented style of programming, concerned with the structuring of data, to avoid many of the existing problems. It uses memory structuring techniques which have been shown to be advantageous to the Object Oriented style and extends these to the world of Transactions. In addition, it will investigate support for the optimisation of Transactional execution using the highly flexible software systems which have been developed for the execution of Object Oriented programs.

在过去的25年里，PC、游戏机等内部的处理器芯片的速度已经提高了许多倍。这通常被称为“摩尔定律”，该定律指出，这种增长将大约每18个月增加2倍。然而，摩尔定律不再适用于最新的半导体技术。功耗等因素阻碍了其所依赖的电子电路的持续缩小。因此，处理器制造商正在转向“多核”处理器，以实现未来性能的提高。核心是以前计算机中结构的单个处理单元的电路。已经可以买到在单个芯片上具有双核的PC，并且用于商业应用的高级处理器具有多个核。不幸的是，为这些多核处理器编写程序所需的技术，特别是对于通用应用，依赖于在处理器之间共享内存的机制，这些机制需要特殊的硬件来确保它们都看到共享内存的一致视图，尽管可以构建这样的硬件以针对少量处理器有效地执行，但是随着处理器的数量和通信系统的大小的增加，不可能保持所需的速度。这将限制未来多核系统的规模，除非找到新的技术。transmittance Memory是一种新的方法来编写程序，利用多核处理器，它不需要相同的共享内存的完全一致的视图。相反，各个处理器处理它们自己的共享内存的临时副本，并在定义的任务结束时协调其状态。这种方法不仅可以消除对复杂的一致性维护机制的需要，而且还可以产生编写更容易理解的多任务程序的方法。然而，transmittance Memory需要专门的组织来支持临时共享副本的维护和协调。目前的建议，这样做已经删除了一些传统的多核系统的限制，但介绍了其他自己的。这个项目提出了一个新的transmittance内存计划，建立在以前类似的工作，但使用特定的面向对象的编程风格的属性进行实际调查，关注的数据结构，以避免许多现有的问题。它使用内存结构技术，这些技术已经被证明对面向对象风格有利，并将其扩展到事务世界。此外，它将调查使用高度灵活的软件系统，已开发的面向对象的程序的执行的优化transmittance执行的支持。

项目成果

High Performance Embedded Architectures and Compilers

高性能嵌入式架构和编译器

• DOI: 10.1007/978-3-642-11515-8_25
• 发表时间: 2010
• 作者: Cooper P

A first insight into object-aware hardware transactional memory

对对象感知硬件事务内存的初步了解

• DOI: 10.1145/1378533.1378552
• 发表时间: 2008
• 作者: Khan B

Euro-Par 2008 - Parallel Processing - 14th International Euro-Par Conference, Las Palmas de Gran Canaria, Spain, August 26-29, 2008. Proceedings

Euro-Par 2008 - 并行处理 - 第 14 届国际 Euro-Par 会议，西班牙大加那利岛拉斯帕尔马斯，2008 年 8 月 26-29 日。

• DOI: 10.1007/978-3-540-85451-7_77
• 发表时间: 2008
• 作者: Ansari M

Euro-Par 2010 - Parallel Processing - 16th International Euro-Par Conference, Ischia, Italy, August 31 - September 3, 2010, Proceedings, Part I

Euro-Par 2010 - 并行处理 - 第 16 届国际 Euro-Par 会议，意大利伊斯基亚，2010 年 8 月 31 日至 9 月 3 日，会议记录，第一部分

• DOI: 10.1007/978-3-642-15277-1_26
• 发表时间: 2010
• 作者: Khan B

High Performance Embedded Architectures and Compilers - Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings

高性能嵌入式架构和编译器 - 第四届国际会议，HiPEAC 2009，塞浦路斯帕福斯，2009 年 1 月 25-28 日。

• DOI: 10.1007/978-3-540-92990-1_14
• 发表时间: 2009
• 作者: Howes L