Development of low-voltage and low-power mixed-signal ICs using nano-scale multiple gate field-effect transistors

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The low-power and cost-effective Complementary Metal-Oxide-Semiconductor (CMOS) devices have forced the analog designers to develop integrated circuits (ICs) using digital CMOS technologies. Conventional nano-scale planar CMOS devices suffer from undesirable short-channel effects, such as high drain induced barrier lowering, substantial leakage currents due to threshold voltage roll-off, lower intrinsic gain, lower output impedance, lower dynamic range and poorer device matching. These non-idealities eventually degrade the performance of CMOS devices and pose a serious threat to ICs' performance. The Multiple gate field-effect transistors, such as Fin-shaped Field Effect Transistors (FinFETs), are emerging as the most promising replacement for planar CMOS in sub-32nm technologies. In fact, FinFET technology offers interesting features such as tight channel control to mitigate short channel effects, and steeper sub-threshold slope. Despite the advantages of multi-gate technologies, new design challenges arise particularly for analog, mixed-signal and radio frequency (RF) circuits. FinFETs suffer from larger parasitic compared to planar CMOS transistors. The narrow fin width increases the source and drain resistances and that result in degrading the high frequency and noise performance of FinFETs. Also the empty region between the gate and the source/drain causes a large increase in the fringe capacitors of the transistor and consequently reduces the speed of RF applications. FinFET devices also show new undesirable effects that have to be taking into consideration while designing analog and mixed-signal circuits; namely self-heating and hysteresis effect. Moreover, accurate physical characterization of FinFET devices represents a tremendous challenge for analog designer and new optimized layout techniques are also necessary to fully benefit from this advanced technology. As a result to enjoy the merit of multi-gate field-effect transistors, the objective of this proposal is to develop novel design methodologies for high performance analog, RF and mixed signal circuits using FinFETs.