以高性能双栅高k介质几层MoS2(FL-MoS2)场效应晶体管为研究目标，设计制备新型(HfTiO/Al2O3)/FL-MoS2/HfSiO/Si栅堆栈结构，重点研究ALD高k顶/底栅介质及其与MoS2的界面特性以及屏蔽效应。通过采用HfTiO/Al2O3堆栈和HfSiO高k介质分别作为顶/底栅介质，对MoS2沟道形成良好包封，不仅能获得好的Al2O3/MoS2/HfSiO界面特性，而且能大大增强高k介质对荷电杂质散射的屏蔽效应，有效减小库伦散射，提高迁移率，同时减小顶/底栅介质等效氧化物厚度，增强栅控能力，使晶体管的通态电流、通/断电流比、跨导、亚阈斜率以及短沟道效应等得到全面改进。将研究ALD制备上述高k栅介质的最佳工艺和条件，研制出相应的双栅高k介质FL-MoS2场效应晶体管原型样品。由于高k顶/底栅介质的包封使用，有望使MoS2晶体管沟长缩短至亚10nm而仍具有优良的电性能。

The project aims at high-performance few-layer MoS2 (FL-MoS2) field-effect transistor (FET) with dual-gate high-k dielectrics. A new stacked gate structure of (HfTiO/Al2O3)/FL-MoS2/HfSiO/Si is proposed and prepared, where fabrication technologies of the high-k top/bottom gate dielectrics by ALD, the high-k/MoS2 interface properties and high-k dielectric screening effect are key research contents. Through using high-k stacked HfTiO/Al2O3 and HfSiO as top- and bottom-gate dielectric respectively to form encapsulation on MoS2 channel, not only can the good Al2O3/MoS2/HfSiO interfaces be obtained, but also the screening effect of high-k dielectric on charged-impurity scattering can largely be enhanced, effectively reducing Coulomb scattering and largely boosting mobility of carriers, and simultaneously decreasing equivalent oxide thickness of the top- and bottom-gate dielectrics and enhancing their gate-controlling ability, thus comprehensively improving performances of the transistor, e.g. the on-current, current on/off ratio, transconductance, subthreshold slope and short-channel effects and so on. Also, the optimal technologies and conditions of fabricating the above high-k gate dielectrics by ALD will be investigated, and the prototype sample of the relevant dual-gate high-k dielectric FL-MoS2 FETs is prepared. It is expected that the encapsulation of the high-k top/bottom gate dielectric can scale down channel length of the MoS2 transistor to below 10 nm, still maintaining excellent electrical properties.