Propagation Delays in the Bilevel and Trilevel Multilayer High Density Interconnections on the GaAs Based VHSIC

对具有更高速度和更高元件密度的电路的需求越来越大。这需要数百万条紧密间隔的互连线来集成芯片上的组件。在这种高密度环境中，与互连相关的寄生电容已经成为VHSIC技术发展的主要因素。特别是对于ASIC(专用集成电路)的开发，在进行制造之前了解IC(集成电路)中预期的传播延迟是很重要的。这项研究的目标是：(A)建立高密度环境中与多电平和多层互连有关的寄生电容的可靠模型，适用于基于GaAs基的VLSI电路；(B)开发用于确定基于GaAs基超高速集成电路的多电平和多层互连中的传播延迟的精确模型；(C)研究了GaAs基超高速集成电路互连中的串扰；(D)制作了GaAs基衬底上的互连线，并实验验证了传输延迟与互连线尺寸、互连材料电阻率和其他几何因素的关系。这项研究有望更好地理解随着芯片尺寸的减小和芯片上互连密度的增加，芯片上互连线之间的相互作用。这对VLSI技术的持续发展非常重要。

There is an increasing demand for circuits with higher speeds and higher component densities. This requires millions of closely spaced interconnection lines that integrate the components on a chip. Parasitic capacitances associated with the interconnections in such high density environments have become the primary factors in the evolution of the VHSIC technology. Particularly for the development of the ASIC's (application specific integrated circuits), it is important to know the propagation delays expected in an IC (integrated circuit) before its fabrication is undertaken. Objectives of the proposed research are: (a) development of reliable models for the parasitic capacitances associated with the multilevel and multilayer interconnection in the high-density environments, suitable for the GaAs-based VLSI circuits; (b) development of accurate models for the determination of the propagation delays in the multilevel and multilayer interconnections on the GaAs-based very high speed integrated circuits; (c) study of the crosstalk in the interconnections on the GaAs-based very high speed integrated circuits; and (d) fabrication of the interconnection lines on the GaAs substrate and experimental verification of the dependence of the propagation delays on the interconnect dimensions, interconnect material resistivity and other geometrical factors. This research is expected to provide a better understanding of the interactions between interconnection lines on VLSI chips as the dimensions decrease and the density of the interconnections on a chip increase. This is very important to the continued development of VLSI technology.