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"Structural and Performance Limitations of Ultra-Submicron Gate-length Modulation-Doped FET's Based on InP Substrate for MM-Wave Amplification"

"Structural and Performance Limitations of Ultra-Submicron Gate-length Modulation-Doped FET's Based on InP Substrate for MM-Wave Amplification"
“用于毫米波放大的基于 InP 衬底的超亚微米栅极长度调制掺杂 FET 的结构和性能限制”
批准号:
8921694
负责人:
Mukunda Das
金额:
$20.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1990
资助国家:
美国
项目状态:
已结题
起止时间:
1990-07-15 至 1992-12-31

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中文摘要
翻译
本研究计划是在InP衬底上基于晶格匹配的A1InAs/InGaAs异质结构,设计、实现和表征100 nm和150 nm门长调制掺杂场效应晶体管(MODFET’s),用于100GHz以上的低噪声和高增益信号放大。宾夕法尼亚州立大学的研究工作将涉及设备结构设计和完成测试设备的电气特性。设备制造的任务将由纽约州锡拉丘兹的ge电子实验室承担,测试样品将提供给PI进行研究,不需要NSF支付额外费用。本研究将研究晶格匹配和伪晶InGaAs的电子输运性质,以及MODFET结构中A1InAs异质结构层的Schottky势垒和缓冲层隔离质量。表征工作将分为四个不同的任务领域,包括直流、小信号、噪声和s参数测量。这些任务领域将研究器件I-V和热稳定性、漏电流、击穿电压、载流子浓度和迁移率、寄生等效网络元件、低频1/f型和g-r噪声源、高频固有器件噪声源、以及MODFET中与速度饱和载流子输运相关的基本传输延迟和充电时间常数的提取。拟议的器件结构有望在100 GHz提供低噪声(1dB)和高增益(8dB)放大,满足未来国防部和NSA通信和雷达系统的要求。
英文摘要
This research proposal is concerned with the design, realization, and characterization of 100 nm and 150 nm gate-length modulation doped field-effect transistors (MODFET's) based on lattice mateched A1InAs/InGaAs heterostructure on InP substrate, and intended for low- noise and high-gain signal amplification above 100GHz. The research efforts at Penn State will involve device structural design and Electrical characterization of the completed test device. The task of device fabrication will be undertaken by G.E. electronics Laboratory, Syracuse, NY, and the test samples will be made available to the PI for studies at no additional cost to NSF. The research will examine the electronic transport properties of the lattice matched and pseudomorphic InGaAs, and the Schottky barrier and buffer layer isolation quality of the A1InAs heterostructure layers in the MODFET structure. The characterization efforts will be organized in four different task areas involving d.c., small-signal, noise, and s-parameter measurements. These task areas will examine the key issues of device I-V and thermal stability, leakage current, breakdownvoltage, carrier concentration and mobility, parasitic equivalent network elements, low frequency 1/f type and g-r noise sources, HF intrinsic device noise sources, and extraction of the fundamental transit delay and charging time constant associated with the velocity saturated carrier transport in MODFET's. The proposed device structure is expected to provide low-noise (1dB) and high gain (8dB) amplification at 100 GHz satisfying the future DoD and NSA communication and radar system requirements.
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会议论文
Fabrication and Characterization of Selectively Contacted Dual Channel Switching Transistors Using III-V Modulation- Doped Heterostructures - Ft. Monmouth
Design and Performance Evaluation of 0.1 um Gate-Length Modulation-Doped FET's for Millimeter-Wave Amplification
Fort Monmouth Interaction: Fabrication and Characterization of Real-Space Transfer Dual Switching Field-Effect Using III-V Modulation-Doped Heterostructures
Expedited Award for Novel Research: Real Space Transfer Dual Switching Field Effect Transistors using III-V Modulation Doped Heterostructures
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