RIA: Frequency to Digital Conversion

Galton这项研究正在评估一种新技术的可行性，并将进一步开发一种新的技术，用于同时执行先前分开的相位跟踪和A/D转换操作。这项技术催生了一系列被称为Sigma-Delta频率数字转换器(SDFDC)的系统，并为各种应用提供了显著降低模拟电路需求的潜力。每个系统都使用粗略的模拟相位测量、量化噪声整形和抽取滤波来执行瞬时频率到数字转换。由于它们在瞬时频率上的工作方式与SD调制器在幅度上的工作方式相同，因此它们分享了基于SD调制器的A/D转换器所享有的许多好处，例如减少了模拟电路需求，并易于VLSI实现。这项研究正在开发由模拟支持的严谨的理论结果，目的是表征SDFDC的性能。还将开发针对特定应用的VLSI原型。

Galton This research is evaluating the viability of and will further develop a novel technique for simultaneously performing the previously separate operations of phase-tracking and A/D conversion. The technique gives rise to a family of systems referred to as Sigma-Delta Frequency-to-Digital Converters (SDFDCs), and offers the potential of significant reductions in analog circuit requirements for a variety of applications. Each system uses coarse analog phase measurements, quantization noise shaping, and decimation filtering to perform instantaneous frequency-to-digital conversion. Because they operate on instantaneous frequency in the manner that SD modulators operate on amplitude, they share many of the benefits enjoyed by SD modulator-based A/D converters such as reduced analog circuit requirements and amenability to VLSI implementation. The research is developing rigorous theoretical results supported by simulations with the goal of characterizing SDFDC performance. A VLSI prototype targeted to a specific application will also be developed.