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System-level Integration of Optics into Multiprocessor Interconnect Architecture

System-level Integration of Optics into Multiprocessor Interconnect Architecture
将光学器件系统级集成到多处理器互连架构中
批准号:
9411587
负责人:
Timothy Pinkston
金额:
$27.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1994
资助国家:
美国
项目状态:
已结题
起止时间:
1994-09-01 至 1998-08-31

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中文摘要
翻译
通信复杂性和延迟是多处理器系统中的一个关键问题。通信延迟的主要部分与互连网络有关。光学在实现低延迟、可扩展的处理器间通信方面具有许多优势。近年来,人们设计了许多光互连;然而,在这些设计中,很少考虑到系统级对互连架构的影响。本研究旨在探讨一种低延迟多处理器通讯的整合设计方案。程序行为、体系结构和光学技术考虑因素被考虑到整体互连设计中。这将导致能够增加网络吞吐量和优化处理器-内存连接的设计。工程设计原则将开发应用高带宽,可重构光互连到电子数字多处理器系统。将开发一种结合延迟减少和隐藏技术的光互连策略。将编写一个互连模拟器来协助设计和性能评估工作。将建立一个小规模的光互连演示单元以显示可行性。因此,这项研究的一个成果是光学设计框架(设计方法、仿真工具和原型),它将构建基础设施,并允许对大型设计空间进行实证评估。* * *
英文摘要
9411587 Pinkston Communication complexity and latency is a critical problem in multiprocessor systems. A major portion of communication latency is associated with the interconnect network. Optics has many advantages for achieving low latency, scalable interprocessor communication. Recently, many optical interconnects have been designed; however, little regard for system-level influences on the interconnect architecture were taken into account in these designs. The proposed research is to investigate an integrated design solution for low latency multiprocessor communication. Program behavior, architecture, and optical technology considerations are factored into the overall interconnect design. This will lead to a design capable of increased network throughput and optimal processor-memory connectivity. Engineering design principles will be developed for applying high bandwidth, reconfigurable optical interconnects to electronic digital multiprocessor systems. An optical interconnect strategy that incorporates latency reduction and hiding techniques will be developed. An interconnect simulator will be written to assist in the design and performance evaluation efforts. A small scale optical interconnect demonstrator unit will be built to show feasibility. Hence, an outgrowth of this research is an optical design framework (design methodology, simulation tools and prototype) that will build infrastructure and allow for empirical evaluation of a large design space. ***
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Collaborative Research: SHF: Small: Architecture Innovations for Enabling Simultaneous Translation at the Edge
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    2223484
  • 项目类别:
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  • 资助金额:
    $15.0万
  • 财政年份:
    2022
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SHF: Small: Collaborative Research: Design of Many-core NoCs for the Dark Silicon Era
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    2016
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    2013
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    $21.79万
  • 财政年份:
    2009
  • 负责人:
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