CAREER: An Integrated Approach for Improving the Performance, Programmability, and Portability of Shared Memory Multiprocessors

虽然共享内存多处理器简化了编程的许多方面，但人们普遍认为，朴素的共享内存程序不太可能在大多数共享内存系统上产生高性能。广泛的目标是开发和评估技术，以提高共享内存系统的性能，同时提高可编程性和可移植性。抑制共享内存系统性能的一个关键问题是，与消息传递程序不同，共享内存程序的确切通信需求并不明显。因此，编译器、运行时系统和硬件通常需要做出保守的假设，导致在特定机器上提供过多的通信和同步原语（例如，锁和屏障），预期的共享行为被这些细节所掩盖。此外，为获得良好性能而必须使用的低级原语因平台而异，从而抑制了程序的可移植性。本研究采用集成的方法来提高系统的性能和可移植性。该方法大致是：(1)识别通用的独立于实现的通信模式以及在编程语言中表达这些模式的原语，(2)开发可被编译器、运行时系统、硬件或它们的某些组合使用的启发式方法，以将这些高级原语映射到特定目标系统支持的适当的低级原语，以及(3)评估由此产生的系统性能优势。通过公开预期的共享行为，可以避免许多不必要的通信实例，从而实现更高的性能。此外，尽管程序员必须从他或她的任务中选择更多种类的同步模式，但由于实现模式的细节留给了编程支持系统（注意，无论如何，共享模式本身必须由程序员理解），因此简化了同步模式。最后，结合整个研究计划中的其他项目，本研究应该证明这些常见的高级同步模式可以在各种平台上得到有效支持，从而增强程序的可移植性。研究计划的这一部分集中于研究一种特定类型的目标系统——一种硬件分布式共享内存多处理器，它使用执行驱动模拟为协议和有效的主动消息支持（例如，斯坦福Flash和威斯康星台风）提供软件控制。该研究计划中的其他项目已经在其他类型的目标系统上探索类似的问题。教育：教育目标分为三大类：课程开发、教学方法和课堂外教育。课程开发部分的目标是(1)介绍一门涉及计算科学家和工程师以及计算机科学家的并行计算课程（包括学生参加和教师教授课程），(2)介绍实际的并行编程经验，作为目前现有的本科计算机体系结构课程的一部分，(3)传授性能分析技术的良好教育。(4)将适度的研究项目作为高级建筑课程的一部分，并通过莱斯大学高级荣誉论文项目积极招募本科生参加拟议的研究项目，向本科生传授研究经验。教育计划的教学方法部分通过接触教学方法研究来解决作为一名有效教师的成长问题。最后一部分寻求(1)鼓励妇女和其他代表性不足的群体通过非正式和正式的研讨会与这些群体积极互动来追求计算机科学，以及(2)通过教程和短期课程鼓励工业界和学术界之间的交流。

While shared-memory multiprocessors simplify many aspects of programming, it is widely believed that naive shared- momory programs are not likely to result in high performance on most shared-memory systems. The broad objective is to develop and evaluate techniques for improving the performance of shared- memory systems while simultaneously enhancing programmability and portability. A key problem that inhibited performance in shared-memory systems is that, unlike message passing programs, the exact communication requirements of shared-memory programs are not obvious. Therefore, compilers, runtime systems, and hardware typically need to make conservative assumptions, resulting in excessive communication and synchronization primitives provided on a particular machine (e.g., locks and barriers), the intended sharing behavior is obscured by these details. Furthermore, the low-level primitives that must be used to obtain good performance vary from platform to platform, thus inhibiting program portability. This research takes an integrated approach to improving the performance, and portability of systems. The approach broadly is: (1) to identify common implementation-independent communication patterns along with primitive to express those patterns in a programming language, (2) to develop heuristics that can be used by the compiler, runtime systems, hardware or some combination thereof to map these high-level primitives to the appropriate low-level primitives supported by the particular target system, and (3) to evaluate the resulting performance benefits on the system. By exposing the intended sharing behavior, many instances of unnecessary communication should be avoided, thus achieving higher performance. Furthermore, despite the larger variety of synchronization patterns that a programmer must choose from his or her task is simplified because details of implementing the patterns are left to the programming support system (note tha t the sharing patterns themselves must be understood by the programmer anyway). Finally, in combination with other projects within the overall research program, this research should demonstrate that these common, high-level synchronization patterns can be efficiently supported on a variety of platforms, thus enhancing the portability of the program. This part of the research program is focused on investigating a specific kind of target system - a hardware distributed shared- memory multiprocessor that provides software control for protocols and efficient active message support (e.g., Stanford Flash and Wisconsin Typhoon)- using execution-driven simulation. Other projects in this research program are already exploring similar issues on other types of target systems. Education: The educational objectives fall within three broad areas: curriculm development, teaching methods, and education outside the classroom. The objectives of the curriculm development part are (1) to introduce a course in parallel computing involving computational scientists and engineers along with computer scientists (both in terms of students attending and faculty teaching the course), (2) to introduce hands-on parallel programming experience as part of currently existing undergraduate computer architecture course, (3) to impart a sound education on performance analysis techniques, and (4) to impart a research experience to undergraduates by having a modest research project as part of the senior level architecture course and by actively recruiting undergraduates in the proposed research program through the Rice senior honor's thesis program. The teaching methods part of the education plan address growth as an effective teacher by exposure to research in teaching methods. The final part seeks to (1) encourage women and other under- represented groups to pursue computer science by actively interacting with such groups informally and through formal workshops, and (2) encourage an ex change between industry and academia through tutorials and short courses.