Hierarchical Testability Analysis and Design Verification for Analog and Mixed-Signal Systems
Hierarchical Testability Analysis and Design Verification for Analog and Mixed-Signal Systems
批准号:
9731433
负责人:
Jacob Abraham
金额:
$13.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1998
资助国家:
美国
项目状态:
已结题
起止时间:
1998-07-15 至 2001-06-30
中文摘要
Mani索马教授(美国)和Mani教授(美国)的联合工作。(华盛顿)和雅各布·亚伯拉罕(美国总统)。得克萨斯州)。本研究主要针对类比与混合讯号积体电路之故障模式、测试产生与设计验证。一个自顶向下的方法来测试和验证混合信号设计正在进行。研究课题包括以下内容。开发从混合信号电路的描述中抽象出电路的算法。定义转换器、滤波器等主要模拟模块的可测性品质因数, 并开发出计算它们的方法。研究使用高阶设计资讯评估混合讯号设计可测性的演算法。对于设计验证,该小组正在寻找精确的转换算法,以将模拟块映射到离散形式。此外,正在探索在验证过程中减少状态空间复杂性的抽象方法。这些算法和方法正在被内置到可测试性和测试工具中。
英文摘要
This joint work between Prof. Mani Soma (U. of Washington) and Jacob Abraham (U. of Texas). The research is on fault models, test generation, and design verification for analog and mixed-signal Integrated circuits. A top-down approach to test and verification in mixed-signal design is being pursued. Research topics include the following. Develop algorithms for abstracting a circuit from the description of a mixed-signal circuit. Define testability figures of merit for major analog blocks such as converters, filters, etc., and develop methods to compute them. Investigate algorithms to evaluate testability of mixed-signal design using high level design information. For design verification, the group is finding accurate transformation algorithms to map analog blocks to discretized form. Also, abstractions to reduce state space complexity during verification are being explored. The algorithms and methods are being built into testability and test tools.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
ITR: Built-in Test for High Speed/RF Mixed-Signal Electronics
-
批准号:0325371
-
项目类别:Continuing Grant
-
资助金额:$28.52万
-
财政年份:2003
-
负责人:Jacob Abraham
-
依托单位:
Fault Modeling and Test Generation for Mixed-Signal Integrated Circuits
-
批准号:9222481
-
项目类别:Continuing Grant
-
资助金额:$28.3万
-
财政年份:1992
-
负责人:Jacob Abraham
-
依托单位:
海外基金