Algorithms for Synthesis and Layout of Analog Intellectual Property

集成电路制造技术的进步使得在单个芯片上实现完整的电子系统成为可能。许多这样的片上系统需要数字和模拟计算。模拟子系统连接到连续的外部世界：无线链路、有线网络、传感器、换能器。数字子系统的电子设计自动化技术相对稳健;模拟子系统的自动化仍然很原始。本项目正在开发关键模拟电路块的综合和布局的设计自动化方法。 该方法的重点是novelnumerical和组合优化算法，可以有效地搜索在许多电路解决方案的候选人。其目标是能够将电路的综合描述作为模拟“知识产权”存档，从而允许它们在新的应用中重复使用和重新定位

Advances in IC fabrication technology make possible complete electronicsystems on a single chip. Many such systems-on-a-chip require both digitaland analog computation. The analog subsystems interface to the continuous,external world: wireless links, wired networks, sensors, transducers.Electronic design automation technology for the digital subsystems isrelatively robust; automation for the analog subsystems is still primitive.This project is developing design automation methods for synthesis andlayout of critical analog circuit blocks. The approach focuses on novelnumerical and combinatorial optimization algorithms that can efficientlysearch over many circuit solution candidates. The goal is to be able toarchive synthesizable descriptions of circuits as analog "intellectualproperty", thus allowing them to be reused and retargeted in newapplications