Analysis and Digital Techniques for Battery-Powered Digital CMOS Circuits

该研究项目是关于电池供电的数字CMOS电路的功率建模、分析和最小化。电池供电电路的集成电池-硬件模型正在开发中。它解释了电路的结构和门级特征，应用于电路的指令和数据的统计特性，以及为电路供电的电池单元的电化学和输出特性。使用这个统一的模型，该项目正在解决找到适当的指标和有效的设计实践的问题，以在性能限制下最大限度地延长电池的使用寿命。正在开发的算法和技术包括：(1)静态和动态电压缩放，选择与给定电路匹配的电池单元，(2)低功耗VLSI电路的rt级设计，以匹配给定的电池单元，(3)在电池组中使用多种电池单元类型，以最大限度地提高给定形状因素和重量的电池使用寿命，以及(4)动态电源管理。在复杂的电池供电数字CMOS设计中，用于功率估计和管理的强大数学模型和算法正在被探索。

The research project is on power modeling, analysis and minimization for battery-powered digital CMOS circuits. An integrated battery-hardware model of the battery-operated circuits is being developed. It accounts for architectural and gate-level features of the circuit, statistical properties of the instructions and data that are applied to the circuit, and electro-chemical and output characteristics of the battery cell that powers the circuit. Using this unified model, the project is addressing the problem of finding appropriate metrics and effective design practices to maximize the battery service life under a performance constraint. Algorithms and techniques are being developed for: (1) static and dynamic voltage scaling, selection of battery cells to match a given circuit, (2) RT-level design of low power VLSI circuits to match a given battery cell, (3) use of multiple battery cell types within a battery pack to maximize the battery service life for given form factor and weight, and (4) dynamic power management. Powerful mathematical models and algorithms for power estimation and management in complex battery-powered digital CMOS designs are being explored.