CSR--EHS: Stochastic Approaches for Dynamic Thermal Management in High Performance Microprocessor Chips

峰值功耗和由此产生的温升已成为限制处理器性能的主要因素，也是其设计成本的重要组成部分。为了在高性能微处理器中实现可接受的基板和互连温度，需要昂贵的封装和散热解决方案。目前的散热解决方案旨在限制处理器的峰值功耗，以确保其在最坏情况下的可靠运行。然而，峰值功率和随后的峰值温度几乎从未被观察到。动态热管理（DTM）作为一类微架构解决方案和软件策略被提出，以在峰值温度限制下实现最高的处理器性能。当芯片接近其热极限时，DTM控制器启动硬件重新配置，减速或关闭以降低芯片温度。可能的响应机制包括微架构调整，例如，获取切换，寄存器文件大小调整和问题宽度减小，和/或动态性能调整，例如，动态电压和频率缩放以及功能单元关闭。该研究旨在开发一种新的DTM解决方案，该方案采用全局预测方法，基于构建和利用微处理器芯片和应用程序的连续时间马尔可夫决策过程模型。在该框架下开发的离线算法是最优的，而这些算法的在线版本易于部署和高度灵活。因此，该项目产生了温度感知策略和技术，以确保微处理器芯片在允许的温度范围内运行，具有最大可能的性能，但不会过度设计。

Peak power dissipation and the resulting temperature rise have become the dominant limiting factors to processor performance and a significant component of its design cost. Expensive packaging and heat removal solutions are needed to achieve acceptable substrate and interconnect temperatures in high-performance microprocessors. Current thermal solutions are designed to limit the peak processor power dissipation to ensure its reliable operation under worst-case scenarios. However, the peak power and ensuing peak temperature are hardly ever observed. Dynamic thermal management (DTM) has been proposed as a class of micro-architectural solutions and software strategies to achieve the highest processor performance under a peak temperature limit. When the chip approaches its thermal limit, a DTM controller initiates hardware reconfiguration, slow-down, or shutdown to lower the chip temperature. Possible response mechanisms include micro-architectural adaptations e.g., fetch toggling, register file resizing, and issue width reduction, and/or on-the-fly performance adjustment e.g., dynamic voltage and frequency scaling and functional unit shut-down. The proposed research aims to develop a new DTM solution that takes a global, predictive approach based on constructing and utilizing a continuous-time Markovian decision process model of the microprocessor chip and the application programs. The offline algorithms developed in this framework are provably optimal whereas the online versions of these algorithms are easily deployable and highly flexible. The project thus produces temperature-aware policies and techniques for ensuring that the microprocessor chips operate within the allowed temperature zone, having maximum possible performance yet not being over-designed.