NER: Nanowire Non-Volatile Memory
NER: Nanowire Non-Volatile Memory
批准号:
0403494
负责人:
Supriyo Bandyopadhyay
金额:
$10.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-07-01 至 2006-06-30
中文摘要
我们建议研究和开发一种新型的非易失性电子存储器,其基于在自组装半导体纳米线的有序阵列中观察到的新型传导双稳态[Appl.Phys.Lett.,76,460(2000)]。该导线具有两个稳定的电导状态,在室温下电导相差四个数量级。这两种状态可用于编码二进制位0和1。当样品在室温下处于高电导状态时,在恢复到低电导状态之前,它保持在该状态1年,当它处于低电导状态时,它保持在该状态的时间长于1年的监测期。长的保留时间可能部分是量子限制和声子瓶颈效应的结果。该系统是一个有前途的候选人,非易失性随机存取存储器具有良好的封装密度。除了保持时间之外,存储器设备的两个重要品质因数是阅读/写的访问速度和读/写操作期间的动态功耗。测得的写入时间(阅读时间要小得多)约为2毫秒,我们相信通过适当的器件设计可以显著减少。用于切换的阈值电压是几十伏,使用相同的设计也可以显著降低。然而,不可避免的惩罚涉及减少访问时间和功耗是一个伴随的保留时间减少。为了开发一个真正先进的记忆,这些相互矛盾的要求必须以最佳的方式满足,这使得这项研究具有高风险和探索性。NER的第二个目的是明确识别负责双稳态的机制。弗吉尼亚联邦大学有一个积极的外展计划,涉及高中学生(RAPME计划为少数民族和QUESTERS计划)。来自这两个项目的学生将参与这项研究(K-12教育)。这项研究将与俄罗斯莫斯科库尔恰托夫研究所的一个小组合作进行。
英文摘要
We propose to investigate and develop a new type of non-volatile electronic memory based on a novel conduction bistability observed in regimented arrays of self assembled semiconductor nanowires [Appl. Phys. Lett., 76, 460 (2000)]. The wires have two stable conductance states that differ in conductance by four orders of magnitude at room temperature. These two states can be used to encode binary bits 0 and 1. When a sample is left in the high conductance state at room temperature, it remains in that state for 1 year before reverting to the low conductance state, and when it is left in the low conductance state, it persists in that state for longer than the monitoring period of 1 year. The long retention time may be partially a result of quantum confinement and the phonon bottleneck effect. This system is a promising candidate for non-volatile random access memory with excellent packing density. Apart from the retention time, two important figures of merit for memory devices are the access speed for reading/writing and the dynamic power dissipation during the read/write operation. The measured writing time (the reading time is much smaller) is ~ 2 msec, which we believe can be reduced significantly with appropriate device design. The threshold voltage for switching is a few tens of volt, which too can be reduced significantly using the same design. However, the unavoidable penalty involved in reducing the access time and power dissipation is a concomitant reduction of the retention time. In order to develop a truly advanced memory, these contradictory requirements must be met in an optimal manner which makes this research high risk and exploratory. A secondary purpose of the NER is to identify unequivocally the mechanism responsible for the bistability. Virginia Commonwealth University has an active outreach program involving high school students (the RAPME program for minorities and the QUESTERS program). Students from both programs will be involved in this research (K-12 education). This research will be carried out in collaboration with a group in Kurchatov Institute, Moscow, Russia.
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会议论文
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项目类别:--
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依托单位: