Single Spin Logic and Matrix Element Engineering: A New Nanoelectronic Computing Paradigm for Ultra Low Power Dissipation

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In conventional digital electronics, binary bits 0 and 1 are represented by different amounts of charge stored in the active region of a device. Switching between bits requires changing the amount of charge, which necessitates a current flow through the device and associated power dissipation. This is a fundamental drawback of charge based electronics. Instead, if binary bits are represented by anti-parallel spin polarizations of an electron placed in a static magnetic field, then switching between bits would simply require flipping the spin without physically moving charges in space and causing a current flow. This can reduce power dissipation in computing machinery by orders of magnitude. In the long run, this allows higher bit density and faster computing speed.This research will be focused on studying single spin based digital computing systems and logic gates. Quantum mechanical calculations will be carried out to show that power dissipation in these gates is extremely small. Spurred by the recent demonstration that organic nanostructures sustain spin memory for a long time (nearly 1 second at 100 K; Nature Nanotechnology, 2, 216, (2007)), quantum dots of organic semiconductors will be fabricated and the spin relaxation times of electrons (T1 and T2) will be measured as a function of temperature to establish the viability of a new computing technology based on spins in self assembled organic nanostructures. Graduate and undergraduate students will be trained in spin based computing, self assembly, magnetotransport measurements, and electron spin resonance spectroscopy. K-12 outreach will be accomplished through the training of 3-4 high school students (9th and 12th grade minority students) through the Richmond Area Program for Minorities in Engineering (RAPME) hosted by the PI?s university every summer.