SBIR Phase I: High Performance, Environmentally Benign, Surface Cleaning and Copper Passivation Processes for Cu-Interconnect Manufacturing

这个小型企业创新研究第一阶段研究项目将开发一种用于半导体器件铜互连制造的清洁和钝化铜的新工艺技术。具有更小特征尺寸的更高性能半导体器件的发展推动了铜和SiCOH低k介电材料的采用。腐蚀是成品率损失和设备故障的主要来源。铝很容易形成保护性的钝化氧化物，而铜则不能。初步数据表明，通过在暴露的铜表面选择性地形成一层薄的无机钝化层，可以同时清洁和钝化铜，其中腐蚀保护是通过选择实现的。这项研究计划的成功完成将最终开发出一种关键资源，用于制造下一代高密度半导体设备。这种铜清洗和钝化的新方法有可能提高制造生产率和制造产量。该铜钝化工艺不仅可用于半导体器件制造中的线路后端(互连形成步骤)，还可用于后端封装应用以及半导体器件制造之外的应用。这种清洁和钝化过程使用的化学物质提供了低成本和环境友好的额外好处。

This Small Business Innovation Research Phase I research project will develop a new process technology for cleaning and passivating copper for semiconductor device Cu-interconnect manufacturing. The development of higher performance semiconductor devices with smaller feature sizes has driven the adoption of copper and SiCOH low-k dielectric materials. Corrosion is a leading source of yield loss and device failure. Whereas aluminum readily forms a protective passivating oxide, copper does not. Preliminary data suggests that it is possible to both clean and passivate copper with a single chemistry where corrosion protection is achieved through the selective formation of a thin inorganic passive layer on exposed copper surfaces. The successful completion of this research program will culminate in the development of a critical resource for use in the manufacture of the coming generations of high-density semiconductor devices. This new approach to copper cleaning and passivation has the potential to increase manufacturing productivity and manufacturing yield. This copper passivation process not only can be used in back-end-of-line (interconnect formation steps) in semiconductor device manufacturing, but also may find use in back-end packaging applications, and applications outside of semiconductor device manufacturing. The chemistry used for this cleaning and passivation process offers the additional benefit of being low cost and environmentally benign.