Modeling and simulation of transport and trapping phenomena in high-k-dielectrics

继续集成电路的小型化不可避免地需要用其他具有优异介电性能的绝缘体来取代二氧化硅，即所谓的高κ介电材料(κ：介电常数)。高κ材料S的引入解决了半导体行业最迫切的问题，即指数级增长的漏电流，从而使进一步的规模化成为可能。这些新材料大多还没有得到很好的研究，特别是电子输运还没有被了解。我们的目标是开发描述传输过程和与传输相关的现象(例如，电荷捕获、降解)的物理模型。这些模型随后将被嵌入到动力学蒙特卡罗算法中，并被合并到模拟工具中。目前用于最新一代处理器和存储芯片的最先进的锆基介质将通过广泛的模拟与实验数据的比较来研究，以对模型进行测试。将对高κ结构的实验难以获得的参数(如界面粗糙度、缺陷密度和分布)进行详细的敏感性分析。建议的理论活动旨在为全球范围内开展的表征和制造活动提供支持。重点将是在材料开发的早期阶段确定可扩展的潜力和可能的问题领域。

Continuing the miniaturization of integrated circuits inevitably requires the replacement of SiO2 by other insulators with superior dielectric properties, the so called ‘high-κ’ dielectrics (κ: permittivity). Introduction of high-κs solves the most urgent problem of semiconductor industry, exponentially growing leakage currents, and thus enables further scaling.These novel materials are mostly not well researched, especially electronic transport is not yet understood. We aim at developing physical models describing the transport processes and transport-related phenomena (e.g. charge trapping, degradation). These models will subsequently be embedded in a kinetic Monte Carlo algorithm and incorporated into simulation tools. State-of-the-art zirconium-based dielectrics, now employed in the newest generation of processors and memory chips will be investigated by extensive comparison of simulations with experimental data to put the models to the test. Detailed sensitivity analysis of high-κ structures on experimentally hard to access parameters (e.g. interface roughness, defect density and distribution) will be carried out.The proposed theoretical activity is intended to provide backup to the characterization and fabrication activities carried out worldwide. Emphasis will be laid on the identification of scaling potentials and possible problem areas at an early stage of material development.