Switching Techniques and Architectures for Performance-Adaptive, Power-Aware Hybrid Opto-Electronic Interconnects

性能自适应、功率感知混合光电互连的开关技术和架构Ahmed Louri，亚利桑那大学0725765知识专长：为了解决高性能计算（HPC）系统的未来互连的性能和功率要求，本研究提出利用光学器件技术的最新重大进展，开发新的带宽可重构和功率可重构的光学器件，高效的光子交换技术、可靠的互连架构以及高效的重新配置控制管理策略。这些交换技术、互连架构和管理策略将与当前的HPC系统无缝集成。这将使HPC架构能够动态适应通信流量模式，并在运行时重新分配带宽。还将监控和动态管理功耗，以优化其使用。可靠性和可扩展性将通过选择适当的光学器件、有效使用动态带宽和电源管理技术以及创新的互连拓扑来解决。在技术方面，本研究探索了有源和无源光学技术的设计空间。对于无源技术，我们建议扩展阵列波导光栅（AWG）的开关能力，实现动态重构。对于有源技术，我们建议使用基于硅的光学环形谐振器，其具有小尺寸、降低的功耗和高带宽特性，适合于HPC系统。更广泛的影响：这项研究的成功可能会对下一代HPC和通信系统的设计产生重大影响。拟议的研究将为未来HPC系统面临的基本通信问题提供新的解决方案，并将在理解性能和功耗之间的相互作用方面取得重大进展。此外，它将提供宝贵的见解和解决方案的关键设计问题，在使用集成的混合系统的高速计算和通信。它还可能催生新的研究领域，如功率感知光电系统、容错光电网络和系统以及高速片上光学互连。拟议的研究还将通过结合器件技术、计算机体系结构、建模和仿真以及物理演示，为本科生和研究生提供多学科培训。

Switching Techniques and Architectures for Performance-Adaptive, Power-Aware Hybrid Opto-Electronic InterconnectsAhmed Louri, University of Arizona0725765Intellectual Merits: To address the performance and power requirements of future interconnects for High Performance Computing (HPC) systems, this research proposes to exploit the recent significant advances in optical device technology to develop new bandwidth-reconfigurable and power-efficient photonic switching techniques, reliable interconnect architectures, and efficient reconfiguration control management strategies. These switching techniques, interconnect architectures, and management strategies will be seamlessly integrated with current HPC systems. This will enable HPC architectures to dynamically adapt to communication traffic patterns and re-allocate bandwidth at run-time. Power consumption will also be monitored and dynamically managed to optimize its use. Reliability and scalability will be addressed through the selection of appropriate optical devices, effective use of dynamic bandwidth and power management techniques, and innovative interconnect topologies. On the technology side, this research explores both active and passive optical technology design space. For passive technology, we propose to extend the switching capabilities of arrayed waveguide gratings (AWGs) to implement dynamic reconfiguration. For active technology, we propose the use of silicon based optical ring resonators, which have a small footprint, reduced power consumption, and high bandwidth characteristics, appropriate for HPC systems. Broader Impact: The success of this research is likely to have a significant impact on the design of next generation HPC and communication systems. The proposed research will provide novel solutions to fundamental communication problems facing future HPC systems and will make significant advances in understanding the interplay between the performance and power consumption. Additionally, it will offer valuable insight and solutions to critical design problems in the use of integrated hybrid systems for high-speed computation and communications. It is also likely to spawn new areas of research such as power-aware opto-electronic systems, fault-tolerant opto-electronic networks and systems, and high-speed on-chip optical interconnects. The proposed research will also provide multi-disciplinary training to undergraduate and graduate students by combining device technology, computer architecture, modeling and simulation, and physical demonstration.