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Collaborative Research: SHF: Medium: Neural-Network-based Stochastic Computing Architectures with applications to Machine Learning

合作研究：SHF：中：基于神经网络的随机计算架构及其在机器学习中的应用

基本信息

批准号：
1953980
负责人：
Ahmed Louri
金额：
$ 60万
依托单位：
George Washington University
依托单位国家：
美国
项目类别：
Continuing Grant
财政年份：
2020
资助国家：
美国
起止时间：
2020-06-15 至 2025-05-31
项目状态：
未结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1953980&HistoricalAwards=false
关键词：
Collaborative Research SHF Medium Neural

项目摘要

Modern computing hardware is constrained by stringent requirements such as extremely small size, low power consumption, and high reliability. Consequently, unconventional computing methods, such as Stochastic Computing (SC), that directly address these issues are of increasing interest, especially for Machine Learning (ML) applications in Artificial Intelligence (AI). SC is a novel computation framework in which input data is continuously provided as a streams of bits; therefore, complex computations can then be computed by simple bit-wise operations on the streams. The main attraction of SC is that it enables very low-cost and low-power architectural implementations, especially for arithmetic operations using simple logic elements. This feature is very relevant to Neural Networks (NNs), because NNs require significant hardware resources, therefore consuming substantial power when processing big datasets for ML. Moreover, current NN architectures are difficult to configure to suit different applications, because the hardware is rather complex and not very flexible. Thus, as ML systems are reaching the fundamental limits of computation using NNs, SC has emerged as a plausible and practical solution to meet performance, energy and resilience requirements for massive parallelism and fast deployment of hardware to support AI with direct impact on technology and national economic growth. The goal of this project is to develop NN architectures that rely on different computational features for cross-cutting schemes (spanning hardware units, algorithms, and applications) aimed at designing such efficient SC-based NNs.The technical work pursued under this project exploits the main features of SC and proposes a sound research program with several novel concepts. The first novelty of this investigation is that it makes possible the design of SC NNs by focusing on architectural-level hardware targeting also important metrics for SC (such as reducing latency and improving accuracy, mostly in inference and training). The second novelty of this work is that it addresses fundamental issues in which simple SC hardware is utilized adaptively to data to sustain a high level of parallel computation in NNs; solutions revolve around a configurable bottom-up scheme in which initially low-level hardware (such as neurons and processing function units) are modularly employed in the NNs to support computation at higher levels. Novel memory organizations to remedy errors when SC is employed are also proposed; this also enhances application-dependent requirements. The third novelty is the provision of having both SC as well as conventional (binary) computation on one combined hardware implementation; this is an added benefit for optimizing computing performance just in case the SC does not meet the accuracy requirements of the application at hand. Therefore, this timely research is directed to the continued technical innovation for emerging computing systems and architectures with relevance to both the computing and ML communities and strong implications on advancements in society and the US computing industry-at-large; moreover, this project is strongly committed to Broadening Participation in Computing (BPC) and its success.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

现代计算硬件受到诸如极小尺寸、低功耗和高可靠性等严格要求的限制。因此，直接解决这些问题的非常规计算方法，如随机计算（SC），越来越受到人们的关注，特别是对于人工智能（AI）中的机器学习（ML）应用。SC是一种新的计算框架，其中输入数据作为比特流连续提供；因此，复杂的计算可以通过对流进行简单的逐位操作来计算。SC的主要吸引力在于它支持非常低成本和低功耗的体系结构实现，特别是对于使用简单逻辑元素的算术运算。这个特征与神经网络（NN）非常相关，因为NN需要大量的硬件资源，因此在处理ML的大数据集时消耗大量的功率。此外，当前的神经网络架构很难配置以适应不同的应用，因为硬件相当复杂，不是很灵活。因此，随着机器学习系统达到使用神经网络计算的基本极限，SC已经成为一种合理而实用的解决方案，可以满足大规模并行和快速部署硬件的性能、能源和弹性要求，以支持人工智能，对技术和国民经济增长产生直接影响。这个项目的目标是开发依赖于不同计算特征的神经网络架构，用于横切方案（跨越硬件单元、算法和应用程序），旨在设计这种高效的基于sc的神经网络。本项目所进行的技术工作利用了SC的主要特点，并提出了一个具有几个新颖概念的完善的研究方案。这项研究的第一个新颖之处在于，它通过关注架构级硬件来设计SC神经网络，这些硬件也针对SC的重要指标（例如减少延迟和提高准确性，主要是在推理和训练中）。这项工作的第二个新颖之处在于，它解决了一些基本问题，在这些问题中，简单的SC硬件被自适应地用于数据，以维持神经网络中的高水平并行计算；解决方案围绕着一个可配置的自下而上的方案，在这个方案中，最初的低级硬件（如神经元和处理功能单元）被模块化地应用于神经网络，以支持更高级别的计算。本文还提出了一种新的记忆组织来弥补SC的错误；这也增强了依赖于应用程序的需求。第三个新颖之处是在一个组合的硬件实现上提供SC和传统（二进制）计算；这对于优化计算性能是一个额外的好处，以防SC不能满足当前应用程序的精度要求。因此，这项及时的研究是针对新兴计算系统和架构的持续技术创新，这些系统和架构与计算和机器学习社区相关，对社会和整个美国计算行业的进步具有重大影响；此外，该项目坚定地致力于扩大计算参与（BPC）及其成功。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

期刊论文数量（11）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Learning-Based Quality Management for Approximate Communication in Network-on-Chips

DOI：
10.1109/tcad.2020.3012235
发表时间：
2020-11
期刊：
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子：
2.9
作者：
Yuechen Chen;A. Louri
通讯作者：
Yuechen Chen;A. Louri

A Technique for Approximate Communication in Network-on-Chips for Image Classification