Heterogeneous Multi-core Architectures from Homogeneous Arrays using Configurable Interconnect
Heterogeneous Multi-core Architectures from Homogeneous Arrays using Configurable Interconnect
批准号:
0903471
负责人:
Kevin Skadron
金额:
$28.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-08-01 至 2013-07-31
中文摘要
微处理器设计的最新趋势是将不同类型的核心集成到同一个芯片上。然而,当前的设计技术只提供一组固定的核心,当工作负载不能很好地匹配这些资源时,系统无法有效地同时使用所有资源,从而导致资源利用率低下。硬件应该适应异构内核的组织以响应动态行为。该项目为实现这种动态异构处理器——现场可编程核心阵列(FPCA)——奠定了基础,该处理器能够在可配置的同构平台上同时实现许多异构架构配置。所需的灵活性将通过结合架构、电路和EDA的进步来提供。这个项目的智力优点是将处理器的前端和功能单元分离到同质的构建块池中,并开发可编程互连,允许这些构建块动态地耦合和解耦,从而实现高效的内核内和内核间连接以及各种异构组织的组装。更广泛的影响将是开发一种新的设计范式,使相同的芯片能够用于更广泛的市场和工作负载。这降低了设计和采购成本,同时提高了程序员的生产力——所有这些都将提供经济和社会效益。该项目还包括教育和外联活动,包括改进新兴编程模式的教学,以及向高中生和代表性不足的群体提供外联服务。
英文摘要
Recent trends in microprocessor design are shifting toward incorporation of heterogeneous core types onto the same die. However, current design techniques provision only a fixed set of cores and suffer from poor resource utilization when the workload is not a good match for those resources and the system cannot efficiently employ all resources simultaneously. Hardware should adapt the organization of the heterogeneous cores in response to dynamic behavior. This project lays the groundwork for realizing such a dynamic heterogeneous processor - the field programmable core array (FPCA) - that is capable of simultaneously implementing many heterogeneous architectural configurations on a configurable, homogeneous platform. The required flexibility will be provided through a combination of architecture, circuit, and EDA advances. The intellectual merit of this project is the technique of separating a processor's front end and functional units into homogeneous pools of building blocks, and development of a programmable interconnect allowing these building blocks to be coupled and decoupled dynamically, enabling efficient intra- and inter-core connectivity and the assembly of a variety of heterogeneous organizations. The broader impact will be the development of a new design paradigm that allows the same chip to be used for a wider range of markets and workloads. This reduces design and procurement costs, while improving programmer productivity - all of which will provide economic and social benefits. This project also includes education and outreach activities, including improved teaching of emerging programming models and outreach to high school students and underrepresented groups.
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