EAGER: SHF: Harnessing Cross-Layer Heterogeneity for Future CMPs

异类多核/芯片多处理器(CMPS)被认为是一种关键的设计范例，以应对电源、内存和可靠性墙的挑战，这些挑战阻碍了使用深亚微米技术进行芯片设计。创建异类体系结构的维度如此之多，涉及多个设备、技术平台和软件堆栈。此外，尽管异构性提供了承诺，但还不清楚(I)真正需要的最显著的异构性形式是什么，以及(Ii)所有这些形式如何在整个系统级别以非直观的方式相互作用。这些问题使这个话题成为一个高风险、高回报的命题。该项目将提供初步结果，以衡量不同架构的潜力和可行性，并制定系统评估战略。半导体产业对美国的国家安全和经济至关重要。随着所有主要芯片供应商都将增加核心数量作为其未来路线图的关键，芯片多处理器的创新至关重要。支持异构式计算可以极大地降低计算的能源成本，同时使其更加强大和可靠。与行业合作伙伴的合作将有助于将许多想法直接转移到行业中。这项研究中开发的工具和技术将公之于众。

Heterogeneous multicores/Chip Multiprocessors (CMPs) are envisioned to be a key design paradigm to combat the challenges of power, memory, and reliability walls that are impeding chip design using deep sub-micron technology. There are so many dimensions to creating heterogeneous architectures, with the issues spanning multiple devices, technology platforms and software stacks. Further, despite the promise that heterogeneity offers, it is not clear (I) what are the most salient forms of heterogeneity that will be really needed, and (ii) how do all these forms interacting in non-intuitive ways at the entire system level. These issues make this topic a high-risk high-reward proposition. This project will provide preliminary results to gauge the potential and feasibility of heterogeneous architectures, and develop strategies for systematically evaluating them.The semiconductor industry is vital to the national security and economy of the United States. With all major chip vendors projecting increased number of cores as the key to their future road maps, innovations in chip multiprocessors is critical. Enabling heterogeneous computing can largely reduce energy costs of computing, while making it more powerful and dependable. Collaboration with industry partners would facilitate direct transfer of many ideas to industry. The tools and techniques developed in this research will be made publicly available.