课题基金 / 基金详情

SHF:Small: Collaborative Research: CONTINUOUS-TIME DIGITAL COMPUTATION AND SIGNAL PROCESSING

SHF:Small: Collaborative Research: CONTINUOUS-TIME DIGITAL COMPUTATION AND SIGNAL PROCESSING
SHF:Small:协作研究:连续时间数字计算和信号处理
批准号:
1420026
负责人:
Rajit Manohar
金额:
$7.28万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-09-01 至 2017-04-30

项目摘要

项目成果

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中文摘要
翻译
这项研究的目标是开发高性能和高能效的数字信号处理器,使用一种新的事件驱动方法,涉及特殊技术,仔细跟踪事件的时间。与标准的“异步”逻辑不同,这种方法本质上使用物理时间作为其信息表示的一部分。在这项研究过程中将开发的系统和技术可以使一些重要的应用受益,包括传感器网络和卫生保健中的生物医学仪器。将要创建的知识体系可能还会在其他领域找到应用,包括控制系统和机器人技术。这项工作具有重要的教育意义,因为它涉及协同发展,将不同的知识领域结合在一起,从而培训参与跨学科工作的研究生和本科生,导致新的创造性解决方案。与经典技术相比,这种方法吸引人的技术特性包括没有混叠,更好的误差频谱特性,以及对变化的输入的更快响应。该方法适用于某些需要极低功耗的应用,特别是那些涉及便携性或难以访问位置的应用。虽然以前的工作集中在证明连续时间数字信号处理器的可行性,但这一新的努力集中在开发下一代系统和实现非常高的性能,需要新的原理和技术。这项工作旨在通过降低有效采样率和改进输出重构来提高连续时间数字信号处理器的性能,通过使用特殊的编码技术来放松信号处理单元中的粒度要求,通过直接处理非均匀量化的信号,并通过使用算法技术;它还将连续时间数字技术扩展到一般的科学计算。拟议的努力将两个具有互补专业知识的小组聚集在一起。哥伦比亚大学小组专门从事混合信号电路,并展示了第一个连续时间数字信号处理器;康奈尔大学小组致力于异步数字电子产品,包括事件驱动处理器和异步数据流现场可编程门阵列。
英文摘要
The goal of this research is to develop high-performance and power-efficient digital signal processors, using a novel event-driven approach involving special techniques that carefully keep track of the timing of events. Unlike standard "asynchronous" logic this approach inherently uses physical time as part of its representation of information. The systems and techniques to be developed in course of this research can benefit a number of important applications, including sensor networks and biomedical instrumentation in health care. The body of knowledge to be created would potentially find applications in other areas as well, including control systems and robotics. The work has a significant educational component, in that it involves synergistic development, combining different domains of knowledge and thus training the graduate and undergraduate students involved in interdisciplinary work, leading to new, creative solutions. Appealing technical properties of this approach include the absence of aliasing, better spectral properties of error, and faster response to changing inputs, compared to classical techniques. The approach is suitable for certain applications that demand very low power dissipation, notably those involving portability or difficult-to-access locations. While prior work concentrated on demonstrating the feasibility of continuous-time digital signal processors, this new effort concentrates on developing next-generation systems and achieving very high performance, necessitating new principles and techniques. The work seeks to advance the performance of continuous-time digital signal processors by reducing the effective sampling rate and improving output reconstruction, by using special coding techniques for relaxing granularity requirements in the signal processing units, by processing directly non-uniformly quantized signals, and by employing algorithmic techniques; it also expands continuous-time digital techniques to general scientific computation. The proposed effort brings together two groups with complementary expertise. The Columbia University group specializes in mixed-signal circuits and has demonstrated the first continuous-time digital signal processors; the Cornell University group works in asynchronous digital electronics, including event-driven processors and asynchronous dataflow FPGAs.
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Summer School/Workshop on Asynchronous Logic: 2022
  • 批准号:
    2227133
  • 项目类别:
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  • 资助金额:
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  • 财政年份:
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  • 负责人:
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  • 项目类别:
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  • 资助金额:
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  • 财政年份:
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  • 负责人:
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  • 依托单位:
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  • 批准号:
    1734577
  • 项目类别:
    Standard Grant
  • 资助金额:
    $7.28万
  • 财政年份:
    2017
  • 负责人:
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  • 依托单位:
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  • 批准号:
    1617945
  • 项目类别:
    Standard Grant
  • 资助金额:
    $35.0万
  • 财政年份:
    2016
  • 负责人:
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