SHF:SMALL:Pushing the Limits of Transparent Specialization

多年来，微处理器利用摩尔定律(较小的连续几代晶体管)和它们消耗的较低功率来制造性能更好的芯片。由于基本的限制，不再可能以经济高效的方式制造更小的晶体管或显著降低其功耗。这项研究项目开发了未来的微处理器，这种处理器以不同的方式组织，更有效地使用有限的晶体管来提供更好的芯片。这项研究项目探索的主要思想是一种根据特定任务定制芯片特定部件的方法，从而使每个组件都非常小且节能。程序的执行从一个这样的组件移动到另一个组件，每个组件都针对程序的那个阶段进行了调优。课程改进将为学生提供丰富的硬件设计经验。这项研究将有助于以新的方式指导微处理器设计，以持续提高性能并帮助保持信息技术的领先地位。本研究采取的具体方法是一种独特的、新颖的专业化形式，称为：行为专业化加速(BSA)。这是一种利用程序行为及其与硬件微体系结构的相互关系的范例。它与工作负载领域无关。专门针对程序行为是有利的，这既是因为更少的加速器可以针对各种代码，也因为这些行为通常可由编译器分析，这意味着它们的使用对程序员来说是透明的。特别是，这项研究将开发一种芯片组织，包括外芯织物和内芯织物。ExoCore交换矩阵是一个处理器核心组织，它使用行为专门化来透明地改进通用工作负载的执行。内部核心交换矩阵采用不同的行为专业化，并尝试使用单一硬件架构和定义良好的软件接口来支持计算密集型领域。这项研究开发了一些机制、一系列ExoCore和Endoccore设计的FPGA原型、相应的编译器以及详细的性能评估。

For many years, microprocessors took advantage of how Moore's Law (smaller successive generations of transistors) and the fact that they consumed less power to build better performing chips. Due to fundamental limitations it is no longer possible to cost-effectively make smaller transistors or significantly reduce their power consumption. This research project develops future microprocessors that are organized differently and more effectively using limited transistors to provide better chips. The main idea this research project explores is a way to tailor certain parts of a chip to certain tasks, thereby making each component very small and power-efficient. A program's execution moves from one such component to another, each being tuned for that phase of the program. The curriculum enhancements will provide students significant experience in designing hardware. This research will help steer microprocessor designs in novel ways to sustain performance improvements and help sustain information technology leadership.The specific approach taken by this research is a unique and novel form of specialization called: behavior specialized acceleration (BSA). This is a paradigm that exploits program behaviors and their inter-relationship to hardware microarchitecture. It is workload domain agnostic. Specializing for program behaviors is advantageous both because fewer accelerators can target a large variety of codes, and because these behaviors are typically analyzable by a compiler, meaning their use can be transparent from programmers. In particular the research will develop a chip organization that includes an ExoCore fabric and an Endocore fabric. The ExoCore fabric is a processor core organization that uses behavior specialization to transparently improve the execution of general-purpose workloads. The Endocore fabric employs different behavior specializations and attempts to support computationally-intensive domains using a single hardware architecture and well-defined software interfaces. This research develops mechanisms, an FPGA prototype of a family of ExoCore and EndoCore designs, their accompanying compiler, and detailed performance evaluation.