SHF: Small: Methodology, Tools, and Circuits for Bundled-Data Resilient Asynchronous Design

这项研究的影响将横跨学术界和工业界，产生：(1)设计和分析异步电路的基本理论，这些电路能够优雅地适应工艺变化，并使接近阈值(即低功耗)的计算变得实用；(2)使异步电路对超低功耗市场更具吸引力的CAD流程。这项研究还伴随着一项促进工程创新的全面计划，包括将这项研究商业化的计划。这些计划还包括电子芯片行业的学生培训和未来劳动力发展。对更长电池寿命和节能设计的不懈需求，增加了对集成芯片电源的需求，使其越来越低，接近门槛水平。这加剧了流程的可变性，迫使在传统的同步时钟周期中增加边际，从而产生远非最佳解决方案。这个提案的重点是最近提出的一种新的弹性异步设计风格，称为“刀片”，它对元稳定性很健壮，对保持时间很健壮，并且在体系结构上是不可知的，不依赖于体系结构重放来纠正错误。该方案将创建一个全面的框架，以支持刀片电路的高效设计，重点放在测试、综合和物理设计上。

The impact of this research will span both academia and industry, yielding: (1) fundamental theory to design and analyze asynchronous circuits that gracefully adapt to process variability and makes near-threshold (i.e., low-power) computing practical; (2) a CAD flow that makes asynchronous circuits far more attractive for the ultra-low-power market. The research is coupled with a comprehensive plan to foster innovation in engineering, including plans for commercializing this research. The plans also include student training and future workforce development for the electronic chip industry.The unrelenting demand for longer battery life and energy-efficient designs is increasing the desire for integrated chip voltage supplies to go lower and lower, approaching near threshold levels. This aggravates process variability which forces increasing margins in traditional synchronous clock periods, yielding far-from-optimal solutions. The focus of this proposal is a recently proposed new resilient asynchronous design style, called the "Blade", that is robust to meta-stability, robust to hold times, and architecturally agnostic, not relying on architectural replay to correct for errors. This proposal will create a comprehensive framework to support the efficient design of Blade circuits with emphasis on test, synthesis, and physical design.