Application of a Generative Grammar for the Automated Architectural Exploration of Digital System-on-Chip (SoC) Platforms

嵌入式系统在许多技术应用中都有应用，从家用设备、消费电子产品到火车或工业机器人的控制和监视。它们被称为行业的隐形冠军，因为它们不断增长的计算能力使过去的各种创新成为可能，并将在未来使更多的创新成为可能。这些系统复杂性的增加，以及在单个硅芯片上集成为片上系统或短SoC，要求为未来的系统提供新的设计方法。为此，可以通过基于平台的设计流程来实现快速SoC实现。这需要创建现有的模块，即所谓的知识产权模块，以形成SoC平台。该平台必须具有可配置的能力，以适应新的需求和规范。目前，平台架构的构建和配置通常是手工完成的。这限制了效率，因为只能研究有限数量的配置。在本项目中，将开发一种新颖而高效的方法来支持系统综合过程中的平台架构构建步骤。对于架构的优化，将研究所谓的生成语法和人工智能搜索方法的应用，这些方法从未在此背景下应用过。这种自动化提出了一个具有挑战性的优化问题，因为系统的拓扑结构被改变，离散参数必须优化。该方法承诺在平台体系结构优化期间对拓扑变化进行非常正式的描述，这对用户来说是全面的，并且如果需要的话，允许交互式控制。在基于开源Wishbone总线规范和OpenCores的OpenRISC处理器架构的子系统平台设计中，研究了该方法的有效性。这个研究项目的结果也会引起其他学科的兴趣，因为类似的离散参数和拓扑变化的优化问题可以在许多其他科学和技术领域找到。

Embedded systems are found in many technical applications, ranging from household devices, consumer electronics to the control and surveillance of trains or industrial robots. They are known as the hidden champions of the industry because their growing computational power made various innovations possible in the past and will make even more possible in the future. The resulting rise in complexity of these systems, as well as the integration on a single silicon die as system-on-chip or short SoC, calls for new design methods for tomorrows systems. For this, a fast SoC realization can be achieved by a platform-based design flow. This requires that existing modules, so called intellectual property blocks, are created to form a SoC platform. This platform must exhibit the ability to be configurable to adapt to new requirements and specifications. Today, this construction and configuration of the platform architecture is often done manually. This limits the efficiency because only a limited number of configurations can be investigated.In this project, a novel and highly efficient approach to support the platform architecture construction step during the synthesis of the system will be developed. For the optimization of the architecture, the application of so-called generative grammars and search methods from artificial intelligence will be investigated, which have never been applied in this context. This automation poses a challenging optimization problem because the topology of the system is altered and discrete parameters must be optimized. This methodology promises a very formal description of the topological changes during the optimization of the platform architecture, which is comprehensive to the user and allows interactive control, if this is wished. The efficiency of the method will be investigated on the platform-based design of a subsystem that is based on the open source Wishbone bus specification and OpenRISC processor architecture from OpenCores. The results of this research project will also be of interest for other disciplines since similar optimization problems with discrete parameters and topological changes can be found in many other scientific and technical fields.