Fabrication of High-Speed Amorphous-Silicon Integrated Circuits

非晶硅薄膜晶体管（a-SiFETs）可以广泛地研究，但在a-SiFETs中存在固有的困难，由于a-SiFETs的低场效应流动性。本研究的对象将通过开发一种新型FET制造工艺和一种FET结构来提高FET性能，并通过开发一种新型电路配置来提高硅电路性能。首先，我们已经开发了一种新型的硅热氧化方法，其温度低于250 ° C。氧化物的电气性质及其接口已经被评估。突破场强度大于4 MV/cm，抵抗力大于&lt;10^（14）&gt;<omega>，接口状态强度约为&lt;10^（11）&gt; / &lt;cm 2&gt; eV。由于我们使用了这一方法，我们开发了一种接近理想的硅MOSFET，显示FET的流动性高达2.9 &lt;cm 2&gt; /Vs，其当前比&lt;10^6&gt;更多，半延迟时间为&lt;10^（10）&gt;年。我们发明了一个新颖的短通道a-SiFET结构，在那里采用了传统限制，由摄影学引起，已经完全符合要求。两个维度的设备模拟程序已经开发，已经使用到累积的设备设计数据。自对齐的短通道FET是通过使用反应离子蚀刻方法制造的，FET表征也是评估的。第三，一个新颖的高速逻辑电路已经提出了由a-SiFETs和a-SiSchottky屏障组成的。计算机模拟表明，具有1米FET的新型电路<micro>可以以多MHz速率运行。一个原型设备已经制造，其性能在80 kHz进行了评估。

Amorphous-Silicon Thin-Film Transistors (a-Si FETs) are studying extensively, but there is a intrinsic difficulty in a-Si FETs caused by low field-effect mobility of a-Si. The object of this study is to improve FET performances by developing a novel FET fabrication process and a FET structure, and also to improve a-Si circuit performances by developing a novel circuit configuration.First, we have developed a novel thermal-oxidation method of silicon at temperatures of as low as 250゜C. Electrical properties of the oxide and its interface have been evaluated. The breakdown field strength was more than 4MV/cm, the resistivity more than <10^(14)> <omega> and the interface state density about <10^(11)> / <cm^2> eV. By using this method we have developed a nearly ideal a-Si MOS FET and showed that the FET has the mobility of as high as 2.9 <cm^2> /Vs, the on-off current ratio of more than <10^6> and half-decay time in the current of as long as <10^(10)> years.Second, we have invented a novel short channel a-Si FET structure where conventional restrictions caused by photo-lithography have been completely eliminated. Two-dimensional device simulation program has been developed and has been used to accumulate device design data. The self-aligned short-channel FET has been fabricated by using reactive ion etching method, and FET characteristics have been evaluated.Third, a novel high speed logic circuit has been proposed which is formed by a-Si FETs and a-Si Schottky barrier diodes. Computer simulation indicated that the novel circuit with 1 <micro> m FET can be operated at multi-MHz rates. A prototype device has been fabricated and its performance at 80kHz has been evaluated.