Research and Development of Flexible Hardware and Remote Reconfiguration Techniques
Research and Development of Flexible Hardware and Remote Reconfiguration Techniques
批准号:
14390041
负责人:
SUEYOSHI Toshinori
金额:
$7.04万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2002
资助国家:
日本
项目状态:
已结题
起止时间:
2002 至 2004
中文摘要
在柔性硬件和远程重构技术的研究与开发中,通过实际实验和定量评价,得出了可重构计算的有效性、一种新的计算范式以及可重构逻辑器件的潜在能力。以下是每个研究部分的主要结果。(1)研究了柔性硬件的器件体系结构,考虑了可用LSI集成的运行时重构机制。提出了新的器件结构,并通过评价验证了其有效性。(2)远程重构技术的开发与应用实验开发了独立于平台的设备重构API,实现了远程重构,并通过远程逻辑分析仪的应用实验证明了其实用性。(3)可重构计算支持软件的开发,技术制图和位置与路径的设计与开发指南,结合相关研究成果和现有EDA工具的评价,提出了面向下一代可重构逻辑的技术。(4)设计和原型化了可重构逻辑ica仿真环境,以研究器件组织的性能和功耗,并开发了适合所提体系结构的硬件设计工具。设计了新一代FPGA,并通过应用实验对其进行了评价。(5)开发了基于软硬件协同设计方案的软件开发环境和适应可重构逻辑的开发环境,从系统描述上实现了软硬件协同综合,并通过嵌入式处理器FPGA的评估平台验证了其有效性。(6)包括远程重构在内的可重构计算实用化实验通过构建远程重构技术系统和具有安全设施的实际应用可行性实验,明确了可重构计算实用化的指导方针。少
英文摘要
The effectiveness of reconfigurable computing, a new computing paradigm and the potential abilities of reconfigurable logic device were worked out from the practical experiments and the quantitative evaluations in the research and development of flexible hardware and remote reconfiguration techniques. The following are major results in each research section.(1)Study on device architecture for flexible hardwareA mechanism of run-time reconfiguration with available LSI integration was considered. New device architecture was proposed and its effectiveness was confirmed from the evaluation.(2)Development of remote reconfiguration techniques and applied experimentsA device reconfiguration API which is independent on platforms was developed to realize remote reconfiguration, and the usefulness was shown through applied experiment using remote logic analyzer.(3)Development of reconfigurable computing support softwareGuidelines for design and development of technology mapping and place and rou … More te techniques toward next generation reconfigurable logic was made from the results of related researches and the evaluation with current EDA tools.(4)Design and prototyping of reconfigurable logicA simulation environment to investigate performance and power consumption according to device organization and hardware design tool suitable for proposed architecture were developed. A next generation FPGA was designed and was also evaluated through applicable experiment.(5)Development of software development environment and adapting to reconfigurable logicA development environment based on hardware/software co-design scheme which realizes cooperative synthesis of hardware and software from system description was developed, and its effectiveness was confirmed by using evaluation platform with embedded processor FPGA.(6)Experiment toward practical use of reconfigurable computing including remote reconfigurationGuidelines for practical use were cleared through building system using remote reconfiguration techniques and feasibility experiment with practical application having security facilities. Less
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動的再構成システムのための機能ローディング機構の開発
动态可重构系统功能加载机制的开发
DOI:
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发表时间:
2004
期刊:
電子情報通信学会コンピュータシステム研究専門委員会所属第2種研究会第4回リコンフィギャラブルシステム研究会論文集
影响因子:
--
作者:
[内田大輔, 福山真幸, 池田征司, 柴村英智, 久我守弘, 末吉敏則]
通讯作者:
末吉敏則
A Shape Evaluation of Circuit Area for Reconfigurable Logic Device
可重构逻辑器件电路区域的形状评估
DOI:
--
发表时间:
2003
期刊:
The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003) Vol.3
影响因子:
--
作者:
[Nasahiro Iida, Toshinori Sueyoshi]
通讯作者:
Toshinori Sueyoshi
M.Kuga, M.Harada, Y.Ishii, Y.Kujuro, H.Shibamura, T.Sueyoshi: "Teaching Materials for System Level Design Education"Proc.of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003). Vol.3. 1642-1645 (20
M.Kuga、M.Harada、Y.Ishii、Y.Kujuro、H.Shibamura、T.Sueyoshi:“系统级设计教育教材”Proc.of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications (
DOI:
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发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
Toshinori Sueyoshi, Morihiro Kuga, Hidetomo Shibamura: "KITE Microprocessor and CAE for Computer Science"Systems and Computers in Japan. 33・18. 64-74 (2002)
Toshinori Sueyoshi、Morihiro Kuga、Hidetomo Shibamura:“计算机科学的 KITE 微处理器和 CAE”日本系统和计算机。
DOI:
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发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
DOI:
10.1109/fpt.2004.1393270
发表时间:
2004-12
期刊:
Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)
影响因子:
--
作者:
[H. Shibamura;Masayuki Fukuyama;Daisuke Uchida;S. Ikeda;M. Kuga;T. Sueyoshi]
通讯作者:
H. Shibamura;Masayuki Fukuyama;Daisuke Uchida;S. Ikeda;M. Kuga;T. Sueyoshi
共 22 条
Development of Self-Repair Dependable system on FPGA
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批准号:22300018
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项目类别:Grant-in-Aid for Scientific Research (B)
-
资助金额:$11.81万
-
财政年份:2010
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负责人:SUEYOSHI Toshinori
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依托单位:
Research for Reconfigurable System Technology using Fine Grained Cell Architecture
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批准号:17300021
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$10.08万
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财政年份:2005
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负责人:SUEYOSHI Toshinori
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依托单位:
Study on Next Generation FPGA toward Reconfigurable Computing
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批准号:11490028
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$9.41万
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财政年份:1999
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负责人:SUEYOSHI Toshinori
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依托单位:
Study of Reconfigurable Processor using Programmable LSI
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批准号:09680344
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.05万
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财政年份:1997
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负责人:SUEYOSHI Toshinori
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依托单位:
Rapid Prototyping Technology for Large Scale Logic Circuits
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批准号:09559014
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$8.32万
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财政年份:1997
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负责人:SUEYOSHI Toshinori
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依托单位:
Study of Cluster Computing on a High Speed Network Environment
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批准号:07680365
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$1.47万
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财政年份:1995
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负责人:SUEYOSHI Toshinori
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依托单位:
Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel Computer
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批准号:05680278
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.28万
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财政年份:1993
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负责人:SUEYOSHI Toshinori
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依托单位:
Study on the Speed-Up of Communications Protocol Processing by Parallel Processing
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批准号:01460256
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项目类别:Grant-in-Aid for General Scientific Research (B)
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资助金额:$3.33万
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财政年份:1989
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负责人:SUEYOSHI Toshinori
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依托单位: