Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel Computer
Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel Computer
批准号:
05680278
负责人:
SUEYOSHI Toshinori
金额:
$1.28万
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (C)
财政年份:
1993
资助国家:
日本
项目状态:
已结题
起止时间:
1993 至 1994
中文摘要
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英文摘要
The following describe the results on the study of interconnection networks towards realization of a reconfigurable parallel computer which were achieved in accordance with the research project plan :1.On the interconnection network of reconfigurable MIMD parallel computer, the points to realize diverse topologies were summarized and the configuration method of a reconfigurable interconnection network which can directly realize the desired topology were clarified.2.Furthermore, the concept of reconfigurable SIMD parallel computer which can flexibly rearrange not only its interconnection network but also its processor array elements to adapt with the application were described. Likewise, its configuration method and fault tolerance ability were confirmed.3.The mapping strategies to realize the desired reconfigurable parallel computer utilizing FPGA,were clarified. Moreover, we fonud out that the generation time has an adverse effect on the automatic generation of FPGA configuration data … More based on mapping algorithm. Consequently, we prepared a library of FPGA configuration data to reduce the time to reconfigure topologies.4.In the process of preparing the above library, the problem of reducing the operation speed in high density implementation caused by wire delay which is dependent on the placement and routing procedures, and the difficulty of control have occurred. So, the idea to control the fluctuation of wire delay was necessary. Thus, a new high performance and high density implementation method was developed to support the preparation of the hard macro of several circuits which cannot be handled by commercial tools.5.A prototype of reconfigurable SIMD parallel computer was developed and had proven to realize processor arrays of different architectures. Furthermore, it was confirmed that high density and high performance implementation can be achieved utilizing the above-mentioned method compared with commercial CAE tools. With these, an integrated development support environment was constructed to develop the potentials of reconfigurable parallel computers. Less
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R.Mine: ""A Reconfigurable SIMD Parallel Processor Utilizing Field Programmable Gate Arrays, "" Proc.JTC-CSCC'93. 841-846 (1993)
R.Mine:“利用现场可编程门阵列的可重新配置 SIMD 并行处理器”,Proc.JTC-CSCC93。
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末吉敏則: "ハードマクロによるFPGAの高性能・高密度実装手法" Proc.1994 Japan FPGA/PLD Conference. 203-212 (1994)
Toshinori Sueyoshi:“使用硬宏的高性能、高密度 FPGA 实现方法”Proc.1994 日本 FPGA/PLD 会议 203-212 (1994)。
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末吉敏則: "システムラピッドプロトタイピングへのFPGA応用例" 電子情報通信学会春季総合大会論文集. 1. SA-3-3- (1995)
Toshinori Sueyoshi:“FPGA 应用到系统快速原型的示例”IEICE 春季会议论文集 1. SA-3-3- (1995)。
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Kenichi Nakagaki: "Design and Implementation of the Educational Microprocessor DLX-FPGA Using VHDL" Proc. Asia Pacific Conf. on Hardware Description Languages. 147-150 (1994)
Kenichi Nakagaki:“使用 VHDL 设计和实现教育微处理器 DLX-FPGA”Proc。
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T.Sueyoshi: ""An Application of FPGA to System Rapid Prototyping, "" IEICE General Conference. 447-448 (1995)
T.Sueyoshi:“FPGA 在系统快速原型中的应用”,IEICE 大会。
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共 13 条
Development of Self-Repair Dependable system on FPGA
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批准号:22300018
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$11.81万
-
财政年份:2010
-
负责人:SUEYOSHI Toshinori
-
依托单位:
Research for Reconfigurable System Technology using Fine Grained Cell Architecture
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批准号:17300021
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$10.08万
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财政年份:2005
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负责人:SUEYOSHI Toshinori
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依托单位:
Research and Development of Flexible Hardware and Remote Reconfiguration Techniques
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批准号:14390041
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$7.04万
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财政年份:2002
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负责人:SUEYOSHI Toshinori
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依托单位:
Study on Next Generation FPGA toward Reconfigurable Computing
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批准号:11490028
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$9.41万
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财政年份:1999
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负责人:SUEYOSHI Toshinori
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依托单位:
Study of Reconfigurable Processor using Programmable LSI
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批准号:09680344
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.05万
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财政年份:1997
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负责人:SUEYOSHI Toshinori
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依托单位:
Rapid Prototyping Technology for Large Scale Logic Circuits
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批准号:09559014
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$8.32万
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财政年份:1997
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负责人:SUEYOSHI Toshinori
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依托单位:
Study of Cluster Computing on a High Speed Network Environment
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批准号:07680365
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$1.47万
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财政年份:1995
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负责人:SUEYOSHI Toshinori
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依托单位:
Study on the Speed-Up of Communications Protocol Processing by Parallel Processing
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批准号:01460256
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项目类别:Grant-in-Aid for General Scientific Research (B)
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资助金额:$3.33万
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财政年份:1989
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负责人:SUEYOSHI Toshinori
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依托单位:
海外基金