Study of Reconfigurable Processor using Programmable LSI

如研究计画所述，本研究以可重构大规模积体电路为基础，研究可重构处理器。作为可重构处理器基础研究的一部分，提出了一种基于硅上系统技术的片上多处理器系统原型。该系统利用了可重构处理器的可重构性和硬件实现的加速特性。利用线程控制机制使可重构特性适应于硬件，并描述了其体系结构。具有动态重配置特性的可重配置逻辑可以忽略其重配置开销，使得处理器能够并行执行处理器同步和线程调度，从而获得较高的性能. Java被选为编写应用程序的编程语言，它代表了可重构处理器程序开发环境的一部分。Java适合编写并行应用程序，因为它在其语言规范中支持并发编程。开发了一个Java语言到硬件描述语言的转换原型程序，该转换器的实现既考虑了仿真的需要，又考虑了FPGA的实现.我们将可重构处理器应用于快速傅立叶变换（FFT）、N皇后问题和局域网模拟器三个方面。评估结果表明，在包括高度并行性的应用中，与传统工作站相比，速度提高了约180倍。此外，10倍的速度被认为是在应用程序限制并行与硬件资源的限制。

As mentioned in the research plan, we study Reconfigurable Processor using Reconfigurable LSI.The followings are major results of the research.1. A system prototype of on-chip multiprocessor using system-on-silicon technology was considered as a part of basic research for reconfigurable processor. The system employed the reconfigurability that is a feature of reconfigurable processor and the speed up by hardware implementation. The reconfiguration feature was adapted to hardware with thread control mechanism and its architecture was described. A reconfigurable logic with the dynamic reconfiguration feature which can ignore its overhead of reconfiguration enables that the processor execute both the processor synchronization and the thread scheduling in parallel, and high performance was achieved.2. Java was selected as a programming language to write applications and it stands for a part of program development environment for reconfigurable processor. Java is suited for writing parallel applications because it supports concurrent programming in its language specification. A prototype program that translates from Java to hardware description language was developed and this translator was realized with consideration for not only simulation but also implementation into FPGAs.3. We applied the reconfigurable processor to three applications ; Fast Fourier Transform (FFT), N Queens problem, and LAN simulator. Evaluation results showed advantages about 180 times speed up comparison with conventional workstation in applications including highly parallelism. Also, 10 times speed up was recognized in applications restricted parallelism with hardware resource limitation.