Study of Reconfigurable Processor using Programmable LSI

如研究计划所述，我们研究使用可重构LSI的可重构处理器。以下是本研究的主要成果。作为可重构处理器基础研究的一部分，提出了一种基于硅上系统技术的片上多处理器系统原型。该系统利用了可重构处理器的可重构性和硬件实现的速度提升。通过线程控制机制使重构特性适应硬件环境，并对其体系结构进行了描述。具有动态重构特性的可重构逻辑可以忽略重构的开销，使处理器能够同时执行处理器同步和线程调度，从而达到高性能。选择Java作为编写应用程序的编程语言，它代表了可重构处理器程序开发环境的一部分。Java适合编写并行应用程序，因为它在其语言规范中支持并发编程。开发了一个从Java到硬件描述语言的翻译原型程序，该翻译程序的实现不仅考虑了仿真，而且考虑了在fpga中的实现。我们将可重构处理器应用于三个应用中；快速傅里叶变换（FFT）， N皇后问题，和局域网模拟器。评估结果表明，在高并行性的应用中，与传统工作站相比，速度提高了180倍。此外，在受硬件资源限制的并行性限制的应用程序中，速度提高了10倍。

As mentioned in the research plan, we study Reconfigurable Processor using Reconfigurable LSI.The followings are major results of the research.1. A system prototype of on-chip multiprocessor using system-on-silicon technology was considered as a part of basic research for reconfigurable processor. The system employed the reconfigurability that is a feature of reconfigurable processor and the speed up by hardware implementation. The reconfiguration feature was adapted to hardware with thread control mechanism and its architecture was described. A reconfigurable logic with the dynamic reconfiguration feature which can ignore its overhead of reconfiguration enables that the processor execute both the processor synchronization and the thread scheduling in parallel, and high performance was achieved.2. Java was selected as a programming language to write applications and it stands for a part of program development environment for reconfigurable processor. Java is suited for writing parallel applications because it supports concurrent programming in its language specification. A prototype program that translates from Java to hardware description language was developed and this translator was realized with consideration for not only simulation but also implementation into FPGAs.3. We applied the reconfigurable processor to three applications ; Fast Fourier Transform (FFT), N Queens problem, and LAN simulator. Evaluation results showed advantages about 180 times speed up comparison with conventional workstation in applications including highly parallelism. Also, 10 times speed up was recognized in applications restricted parallelism with hardware resource limitation.