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Study on Next Generation FPGA toward Reconfigurable Computing

Study on Next Generation FPGA toward Reconfigurable Computing
面向可重构计算的下一代FPGA研究
批准号:
11490028
负责人:
SUEYOSHI Toshinori
金额:
$9.41万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
1999
资助国家:
日本
项目状态:
已结题
起止时间:
1999 至 2001

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中文摘要
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英文摘要
As mentioned in the research plan, we studied on next generation FPGA toward reconfigurable computing. The following are major results of the research.1. Design and evaluation of a next generation FPGARequirements for a next generation FPGA toward reconfigurable computing were examined using commercial FPGAs. Moreover, basic architecture for a next generation FPGA were designed, and their quantitative evaluations were performed. In detail, area utilization, delay time, and implementation density were evaluated using practical circuits, and then a novel logic block suitable for next generation FPGA was proposed. The FPGA provides functions of multi-context, multi-grain/cluster, and configuration data cache was proposed. Furthermore, the following were made clear : the implementation density and the implementation efficiency were improved as compared with conventional logic block, and utilization of configuration data was reduced.2. Building a development environment and supporting our p … More roposed next generation FPGAA development environment of next generation FPGA for reconfigurable computing was built based on hardware/software co-design method. The multi-context extract tool and the technology-mapping tool were developed that effectively utilized various functions of the logic block for next generation FPGA we developed in this study.3. Feasibility study on reconfigurable computingThe practical applications for multimedia use were developed, and the feasibility experiment was executed by industry-university co-operation. Moreover, the feasibility of software radio in the field of communication equipment was examined and the investigation using commercial FPGA was performed. From these results, the potential possibility of next generation FPGA for reconfigurable computing was confirmed. Besides, the device reconfiguration technology by remote control that utilized the merits of ISP function of IEEE1149.1 and the JAVA was developed, and its effectiveness was confirmed through the feasibility experiment. Less
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通讯作者:
Toshinori Sueyoshi and Masahiro lida: "Configurable and Reconfigurable Computing for Digital Signal Processing"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. Vol. E85-A, No. 3. 591-599 (2002)
Toshinori Sueyoshi 和 Masahiro lita:“数字信号处理的可配置和可重新配置计算”IEICE 电子、通信和计算机科学基础汇刊。
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末吉敏則,飯田全広: "リコンフィギャラブル・コンピューティング"情報処理学会誌. 40巻8号. 777-782 (1999)
Toshinori Sueyoshi、Masahiro Iida:“可重构计算”日本信息处理学会杂志,第 40 卷,第 8 期。777-782 (1999)
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末吉敏則: "プログラマブルロジックデバイス-過去から未来へ-"電子情報通信学会 信学技法. CAS2001-96. 17-24 (2002)
Toshinori Sueyoshi:“可编程逻辑器件 - 从过去到未来”电子、信息和通信工程师研究所,IEICE 技术。17-24 (2002)。
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23
    Development of Self-Repair Dependable system on FPGA
    • 批准号:
      22300018
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $11.81万
    • 财政年份:
      2010
    • 负责人:
      SUEYOSHI Toshinori
    • 依托单位:
    Research for Reconfigurable System Technology using Fine Grained Cell Architecture
    • 批准号:
      17300021
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $10.08万
    • 财政年份:
      2005
    • 负责人:
      SUEYOSHI Toshinori
    • 依托单位:
    Research and Development of Flexible Hardware and Remote Reconfiguration Techniques
    • 批准号:
      14390041
    • 项目类别:
      Grant-in-Aid for Scientific Research (B)
    • 资助金额:
      $7.04万
    • 财政年份:
      2002
    • 负责人:
      SUEYOSHI Toshinori
    • 依托单位:
    Study of Reconfigurable Processor using Programmable LSI
    • 批准号:
      09680344
    • 项目类别:
      Grant-in-Aid for Scientific Research (C)
    • 资助金额:
      $2.05万
    • 财政年份:
      1997
    • 负责人:
      SUEYOSHI Toshinori
    • 依托单位:
    海外基金