Study on Fusion-neutron Damage Dynamics of Semiconductor Materials

为了研究核聚变中子对内存集成电路软误差的影响，用14 MeV中子辐照了几种1 Mbit CMOS SRAM集成电路。考虑到芯片中的细胞数量，我们得到了1 Mbit CMOS sram的中子磁化率常数，即6-9*10^<-14> cm^2的位软误差截面。这意味着软误差是由存储单元中有限区域的中子反应引起的。根据离子输运码TRIM-90和ENDF-B-VI中子截面数据，用蒙特卡罗程序计算得到的位软误差截面值与计算结果基本一致。此外，我们还研制了一种专用的离子束装置，用于软误差机理的检测。用氘核加速器的中子辐照硅表面势垒探测器（Si-SSD）。泄漏电流随中子通量成比例增大，决定了Si-SSD的中子损伤常数。由DT和DD中子损伤常数之比确定Si-SSD中DT和DD中子损伤的相关系数为2.3。我们还利用TRIM-90代码和Si- ssd中中子反应的数据计算了Si的DT和DD中子位移损伤率。计算得到的DT和DD中子损伤相关系数与Si-SSD辐照实验结果一致。

In order to examine the fusion neutron induced soft-error on memory ICs, several kinds of 1 Mbit CMOS SRAM ICs were irradiated with 14 MeV neutrons. Considering the cell population in the chip, we obtained the neutron susceptibility constant, i.e.bit soft-error cross section of 6-9*10^<-14> cm^2 for 1 Mbit CMOS SRAMs. This means that a soft-error is caused by neutron reactions in a limited region in a memory cell. The bit soft-error cross section value agreed roughly with that calculated by computer simulation with a Monte Carlo program based on the ion transport code TRIM-90 and the ENDF-B-VI neutron cross section data. Also we developed a special ion-beam apparatus for the examination of the soft-error mechanism.A silicon surface barrier detector (Si-SSD) was irradiated with neutrons from a deuteron accelerator. The leakage current increased proportionally with neutron fluence, which determined the neutron damage constant for the Si-SSD.The correlation factor of the DT and DD neutron damage in the Si-SSD was determined from the ratio of the DT and DD neutron damage constant and was found to be 2.3. We also calculated the rate of DT and DD neutron displacement damage for Si by using the TRIM-90 code and data on neutron reactions in the Si-SSD.The correlation factor of DT and DD neutron damage from the calculation agreed with that from the Si-SSD irradiation experiment.