CDT Compound Semiconductor Physics (PhD Progression 1+3)

垂直腔面发射激光器（VCSELs）在数据通信、原子钟、激光雷达、人脸/手势识别和增强现实等应用中有着广泛的应用。在神经形态计算领域，光脉冲或“尖峰”被用来模拟神经元的放电。如果以正确的方式设计，vcsel还可以用于靶向光敏蛋白（视蛋白），引起用于光遗传治疗的生物神经元的激活。将其与专为神经形态计算中的尖峰而设计的VCSEL相结合，可以为神经假肢（脑机接口）提供一条有效的途径，这是神经科学和生物医学工程的一个令人兴奋的新领域。单独来说，vcsel是相对较低的功率发射器（10s mW），但在阵列或耦合配置中，尽管有适当的热管理，但这种功率可以缩放。锗（Ge）衬底具有比砷化镓更高的导热性，并且允许更薄的衬底进一步帮助热提取，这是该项目可以探索的领域。根据配置的不同，vcsel阵列可以稀疏地或密集地排列在一起，这可能会由于工艺参数的影响而导致器件架构的显著变化，例如“宽高比相关蚀刻”。此外，在短脉冲VCSELs中需要增益和可饱和吸收部分，需要仔细控制蚀刻参数，以满足腔内电触点所需的深度。该项目将重点优化工艺参数，以实现可寻址的vcsel阵列，用于峰值或高脉冲功率，测试将用于改进制造。此外，将探索使用等离子体芯片分离技术分离出密集阵列的路线，在Ge衬底的情况下，由于切割困难，这可能变得至关重要。

Vertical cavity surface emitting lasers (VCSELs) have widespread use in applications such as datacoms, atomic clocks, LiDAR, face/gesture recognition and augmented reality. In the field of neuromorphic computing, optical pulses or 'spiking' is used to imitate the firing of neurons. If designed in the correct way, VCSELs can also be used to target photosensitive proteins (opsins), causing activation of biological neurons used in optogenetic therapy. Combining this with a VCSEL designed for spiking in neuromorphic computing could provide an effective route to neural-protheses (brain-computer interfacing), an exciting new area of neuroscience and biomedical engineering. Individually, VCSELs are relatively low power emitters (10s mW), but in arrays or coupled configurations this power can be scaled, albeit with appropriate thermal management. Germanium (Ge) substrates have a higher thermal conductivity than gallium arsenide and allow for thinner substrates further aiding heat extraction, an area which can be explored in the project. Depending on the configuration, arrays of VCSELs can be sparsely or densely packed together and this can cause significant variation in device architecture due to the impact on process parameters, such as 'aspect-ratio dependant etching'. Additionally, the need for gain and saturable absorber sections in short-pulse VCSELs requires careful control of etching parameters to meet the required depths for intra-cavity electrical contacts. This project will focus on optimising process parameters to achieve addressable arrays of VCSELs for spiking or high pulse-powers and testing will be used to inform improvements in fabrication. Furthermore, routes to separate out dense arrays using plasma-die separation techniques will be explored, in the case of Ge substrates this can become critical due to cleaving difficulties.