Reconfigurable Architectures for Floating Point Applications

现场可编程门阵列（FPGA）是集成电路，其功能可以通过可下载的比特流来描述。通过下载不同的比特流配置，可以开发定制的应用程序，与基于微处理器的设计相比，在功率和面积方面有所改进。迄今为止，大多数基于FPGA的应用程序都使用定点运算，因为在FPGA上实现浮点运算的成本很高。Xilinx和Altera这两个领先的FPGA供应商采用了所谓的岛式架构，在这种架构中，实现用户定义逻辑的相对较小的逻辑单元被可编程路由通道所包围。在这个项目中，我们建议开发专门针对信号处理、嵌入式系统和高性能计算中的浮点应用进行优化的FPGA。在浮点密集型计算方面，这些器件在速度和功耗方面都优于现有的FPGA和微处理器，据我们所知，以前的FPGA还没有报道过。基准问题，将被用来衡量性能的建议FPFPGA architectures和一个工具，将产生集成电路布局从高层架构描述的FPFPGA。我们的发展的地方和路线工具将从多伦多大学开发的现有VPR工具开始开始。这将被修改，以允许额外的整数功能单元和浮点单元被添加到VPR支持的基本岛式架构。

Field programmable gate arrays (FPGAs) are integrated circuits whose functionality can be described via a downloadable bitstream. By downloading different bitstream configurations, customised applications can be developed with improvements in power and area over microprocessor based designs. To date, most FPGA-based applications have used fixed point arithmetic as floating point is expensive to implement on an FPGA. The two leading FPGA vendors, Xilinx and Altera, employ the so called island style architecture in which relatively small logic cells that implement the user-defined logic are surrounded by programmable routing channels.In this project we propose to develop FPGAs that are specifically optimised for floating point applications in signal processing, embedded systems and high performance computing. These will have speed and power advantages over existing FPGAs and microprocessors for floating point intensive computations and, to the best of our knowledge, no previous FPFPGAs have been reported.Three key tools will be developed in the course of this project: the development of a place and route tool that supports generalised FPFPGA architectures; benchmark problems that will be used to measure the performance of proposed FPFPGA archiectures and a tool which will produce integrated circuit layouts from the high level architectural description of the FPFPGA.Our development of the place and route tool will begin from the existing VPR tool developed at the University of Toronto. This will be modified to allow additional integer functional units and floating point units to be added to the basic island style architecture supported by VPR.