An Efficient Page and Object-based Transactional Memory System

在过去的25年里，个人电脑、游戏机等的处理器芯片的速度已经提高了很多倍。这通常被称为“摩尔定律”，即每18个月这种增长将大约是2倍。然而，摩尔定律不再适用于最新的半导体技术。诸如功耗等因素阻碍了它所依赖的电子电路的持续缩小。因此，处理器制造商正在转向“多核”处理器，以实现未来性能的提升。核心是指以前的计算机中单个处理单元的电路结构。现在已经可以买到单芯片双核的个人电脑，用于商业应用的高级处理器也有几个核。不幸的是，为这些多核处理器编写程序所需的技术，特别是通用应用程序，依赖于处理器之间共享内存的机制，这需要特殊的硬件来确保它们在公共通信系统上都看到共享内存的一致视图。虽然有可能构建这样的硬件，使其在少量处理器上有效地执行，但随着处理器数量和通信系统规模的增加，保持所需的速度是不可能的。因此，除非找到新的技术，否则这将限制未来多核系统的规模。事务性内存是利用多核处理器编写程序的一种新方法，它不需要完全一致的共享内存视图。相反，各个处理器处理自己的共享内存临时副本，并在定义的任务结束时协调其状态。这种方法不仅可以消除对复杂的一致性维护机制的需要，而且还可以产生更容易理解的编写多任务程序的方法。然而，事务性内存需要专门的组织来支持临时共享副本的维护和协调。目前的建议已经消除了传统多核系统的一些限制，但引入了它们自己的其他限制。本项目建议对一种新的事务性内存方案进行实际研究，该方案建立在先前类似工作的基础上，但使用面向对象编程风格的特定属性，关注数据结构，以避免许多现有问题。它使用内存结构技术，这种技术已被证明对面向对象风格是有利的，并将其扩展到事务的世界。此外，它将研究使用高度灵活的软件系统来优化事务执行的支持，这些系统是为执行面向对象的程序而开发的。

For the last 25 years, the processor chips inside PCs, games consoles etc. have increased in speed many times over. This is often refereed to as 'Moores Law' which states that this increase will be approximately a factor of 2 every 18 months.However, Moores Law no longer holds for the latest semiconductor technology. Factors such as power dissipation prevent the continued shrinking of electronic circuits on which it depends.Processor manufacturers are therefore turning to 'multi-core' processors to achieve future increases in performance. A core being the circuit of a single processing unit of the structure found in previous computers. It is already possible to buy PCs which have dual cores on a single chip and advanced processors intended for commercial applications have several cores.Unfortunately the techniques required to write programs for these multi-core processors, particularly for general purpose applications, rely on mechanisms to share the memory between processors which require special hardware to ensure that they all see a consistent view of the shared memory over a common communication system.Although it is possible to build such hardware to perform efficiently for small numbers of processors, as the number of processors and the size of the communication system increases, it is impossible to maintain the required speed. This will therefore limit the size of future multi-core systems unless new techniques are found.Transactional Memory is a new approach to writing programs, to make use of multi-core processors, which does not require the same fully consistent view of shared memory. Instead, individual processors work on their own temporary copies of shared memory and reconcile its state at the end of defined tasks. This approach can not only remove the need for complex consistency maintaining mechanisms but also result in methods for writing multi-task programs which are easier to understand.However, Transactional Memory requires organisation specifically to support the maintenance and reconciliation of temporary shared copies. Current proposals to do this have removed some of the restrictions of conventional multi-core systems but introduced others of their own.This project proposes to perform a practical investigation of a novel Transactional Memory scheme which builds upon previous similar work but uses properties particular to the Object Oriented style of programming, concerned with the structuring of data, to avoid many of the existing problems. It uses memory structuring techniques which have been shown to be advantageous to the Object Oriented style and extends these to the world of Transactions. In addition, it will investigate support for the optimisation of Transactional execution using the highly flexible software systems which have been developed for the execution of Object Oriented programs.